-
CONFIG_CLOCK_STM32_PLL_R_DIVISOR
¶
PLL R Divisor
PLL R Divisor
PLL R Divisor
PLL R Divisor
Type: int
Help¶
PLL R Output divisor, allowed values: 1-128.
Help¶
PLL R Output divisor, allowed values: 0, 2, 4, 6, 8.
Help¶
PLL R VCO divisor, allowed values: 2-8.
Help¶
PLL R Output divisor, allowed values: 2, 4, 6, 8.
Direct dependencies¶
(CLOCK_STM32_SYSCLK_SRC_PLL
&& SOC_SERIES_STM32H7X
&& CLOCK_CONTROL_STM32_CUBE
&& SOC_FAMILY_STM32
&& CLOCK_CONTROL
) || (CLOCK_STM32_SYSCLK_SRC_PLL
&& (SOC_SERIES_STM32L4X
|| SOC_SERIES_STM32WBX
) && CLOCK_CONTROL_STM32_CUBE
&& SOC_FAMILY_STM32
&& CLOCK_CONTROL
) || (CLOCK_STM32_SYSCLK_SRC_PLL
&& SOC_SERIES_STM32G0X
&& CLOCK_CONTROL_STM32_CUBE
&& SOC_FAMILY_STM32
&& CLOCK_CONTROL
) || (CLOCK_STM32_SYSCLK_SRC_PLL
&& SOC_SERIES_STM32G4X
&& CLOCK_CONTROL_STM32_CUBE
&& SOC_FAMILY_STM32
&& CLOCK_CONTROL
)
(Includes any dependencies from ifs and menus.)
Defaults¶
2
4
2
2
Kconfig definitions¶
At drivers/clock_control/Kconfig.stm32h7:88
Included via Kconfig:8
→ Kconfig.zephyr:37
→ drivers/Kconfig:46
→ drivers/clock_control/Kconfig:25
→ drivers/clock_control/Kconfig.stm32:123
Menu path: (Top) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control
config CLOCK_STM32_PLL_R_DIVISOR int "PLL R Divisor" range 1 128 default 2 depends onCLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32H7X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
help PLL R Output divisor, allowed values: 1-128.
At drivers/clock_control/Kconfig.stm32l4_wb:42
Included via Kconfig:8
→ Kconfig.zephyr:37
→ drivers/Kconfig:46
→ drivers/clock_control/Kconfig:25
→ drivers/clock_control/Kconfig.stm32:125
Menu path: (Top) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control
config CLOCK_STM32_PLL_R_DIVISOR int "PLL R Divisor" range 0 8 default 4 depends onCLOCK_STM32_SYSCLK_SRC_PLL
&& (SOC_SERIES_STM32L4X
||SOC_SERIES_STM32WBX
) &&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
help PLL R Output divisor, allowed values: 0, 2, 4, 6, 8.
At drivers/clock_control/Kconfig.stm32g0:41
Included via Kconfig:8
→ Kconfig.zephyr:37
→ drivers/Kconfig:46
→ drivers/clock_control/Kconfig:25
→ drivers/clock_control/Kconfig.stm32:126
Menu path: (Top) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control
config CLOCK_STM32_PLL_R_DIVISOR int "PLL R Divisor" range 2 8 default 2 depends onCLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32G0X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
help PLL R VCO divisor, allowed values: 2-8.
At drivers/clock_control/Kconfig.stm32g4:40
Included via Kconfig:8
→ Kconfig.zephyr:37
→ drivers/Kconfig:46
→ drivers/clock_control/Kconfig:25
→ drivers/clock_control/Kconfig.stm32:127
Menu path: (Top) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control
config CLOCK_STM32_PLL_R_DIVISOR int "PLL R Divisor" range 2 8 default 2 depends onCLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32G4X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
help PLL R Output divisor, allowed values: 2, 4, 6, 8.
(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)