CONFIG_I2S_STM32_PLLI2S_PLLM

Division factor for PLLI2S VCO input clock

Type: int

Help

Division factor for the audio PLL (PLLI2S) VCO input clock. PLLM factor should be selected to ensure that the VCO input frequency ranges from 1 to 2 MHz. It is recommended to select a frequency of 2 MHz to limit PLL jitter. Allowed values: 2-63

Direct dependencies

(I2S && BOARD_96B_ARGONKEY) || (I2S && BOARD_96B_STM32_SENSOR_MEZ) || (I2S_STM32_USE_PLLI2S_ENABLE && I2S_STM32 && I2S)

(Includes any dependencies from ifs and menus.)

Defaults

  • 8
  • 8
  • 8

Kconfig definitions

At boards/arm/96b_argonkey/Kconfig.defconfig:56

Included via Kconfig:8Kconfig.zephyr:23

Menu path: (Top)

config I2S_STM32_PLLI2S_PLLM
    int
    default 8
    depends on I2S && BOARD_96B_ARGONKEY

At boards/arm/96b_stm32_sensor_mez/Kconfig.defconfig:40

Included via Kconfig:8Kconfig.zephyr:23

Menu path: (Top)

config I2S_STM32_PLLI2S_PLLM
    int
    default 8
    depends on I2S && BOARD_96B_STM32_SENSOR_MEZ

At drivers/i2s/Kconfig.stm32:30

Included via Kconfig:8Kconfig.zephyr:37drivers/Kconfig:36drivers/i2s/Kconfig:28

Menu path: (Top) → Device Drivers → I2S bus drivers → STM32 MCU I2S controller driver → Enable usage of PLL

config I2S_STM32_PLLI2S_PLLM
    int "Division factor for PLLI2S VCO input clock"
    range 2 63
    default 8
    depends on I2S_STM32_USE_PLLI2S_ENABLE && I2S_STM32 && I2S
    help
      Division factor for the audio PLL (PLLI2S) VCO input clock.
      PLLM factor should be selected to ensure that the VCO
      input frequency ranges from 1 to 2 MHz. It is recommended
      to select a frequency of 2 MHz to limit PLL jitter.
      Allowed values: 2-63

(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)