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Architecture Configuration Options

Kconfig files describe build-time configuration options (called symbols in Kconfig-speak), how they’re grouped into menus and sub-menus, and dependencies between them that determine what configurations are valid.

Kconfig files appear throughout the directory tree. For example, subsys/power/Kconfig defines power-related options.

This documentation is generated automatically from the Kconfig files by the gen_kconfig_rest.py script. Click on symbols for more information.

Configuration Options

Symbol name

Prompt

CONFIG_64BIT

CONFIG_AARCH64_IMAGE_HEADER

Add image header

CONFIG_ACPI

ACPI (Advanced Configuration and Power Interface) support

CONFIG_ARC

CONFIG_ARCH

CONFIG_ARCH_HAS_COHERENCE

CONFIG_ARCH_HAS_DEMAND_PAGING

CONFIG_ARCH_HAS_EXECUTABLE_PAGE_BIT

CONFIG_ARCH_HAS_EXTRA_EXCEPTION_INFO

CONFIG_ARCH_HAS_GDBSTUB

CONFIG_ARCH_HAS_NESTED_EXCEPTION_DETECTION

CONFIG_ARCH_HAS_NOCACHE_MEMORY_SUPPORT

CONFIG_ARCH_HAS_RAMFUNC_SUPPORT

CONFIG_ARCH_HAS_RESERVED_PAGE_FRAMES

CONFIG_ARCH_HAS_SINGLE_THREAD_SUPPORT

CONFIG_ARCH_HAS_STACK_PROTECTION

CONFIG_ARCH_HAS_THREAD_ABORT

CONFIG_ARCH_HAS_THREAD_LOCAL_STORAGE

CONFIG_ARCH_HAS_TIMING_FUNCTIONS

CONFIG_ARCH_HAS_TRUSTED_EXECUTION

CONFIG_ARCH_HAS_USERSPACE

CONFIG_ARCH_IS_SET

CONFIG_ARCH_MAPS_ALL_RAM

CONFIG_ARCH_POSIX

CONFIG_ARCH_POSIX_RECOMMENDED_STACK_SIZE

CONFIG_ARCH_SUPPORTS_ARCH_HW_INIT

CONFIG_ARCH_SUPPORTS_COREDUMP

CONFIG_ARCH_SW_ISR_TABLE_ALIGN

Alignment size of a software ISR table

CONFIG_ARC_CONNECT

ARC has ARC connect

CONFIG_ARC_CORE_MPU

ARC Core MPU functionalities

CONFIG_ARC_EXCEPTION_DEBUG

Unhandled exception debugging information

CONFIG_ARC_EXCEPTION_STACK_SIZE

ARC exception handling stack size

CONFIG_ARC_FIRQ

FIRQ enable

CONFIG_ARC_FIRQ_STACK

Enable separate firq stack

CONFIG_ARC_FIRQ_STACK_SIZE

FIRQ stack size

CONFIG_ARC_HAS_ACCL_REGS

Reg Pair ACCL:ACCH (FPU and/or MPY > 6)

CONFIG_ARC_HAS_SECURE

ARC has SecureShield

CONFIG_ARC_HAS_STACK_CHECKING

ARC has STACK_CHECKING

CONFIG_ARC_HAS_ZOL

CONFIG_ARC_MPU

ARC MPU Support

CONFIG_ARC_MPU_ENABLE

Enable MPU

CONFIG_ARC_MPU_VER

ARC MPU version

CONFIG_ARC_NORMAL_FIRMWARE

Generate Normal Firmware

CONFIG_ARC_SECURE_FIRMWARE

Generate Secure Firmware

CONFIG_ARC_STACK_CHECKING

CONFIG_ARC_STACK_PROTECTION

CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS

Enable unaligned access in HW

CONFIG_ARM

CONFIG_ARM64

CONFIG_ARM64_PA_BITS

CONFIG_ARM64_PA_BITS_32

32-bit

CONFIG_ARM64_PA_BITS_36

36-bit

CONFIG_ARM64_PA_BITS_40

40-bit

CONFIG_ARM64_PA_BITS_42

42-bit

CONFIG_ARM64_PA_BITS_48

48-bit

CONFIG_ARM64_VA_BITS

CONFIG_ARM64_VA_BITS_32

32-bit

CONFIG_ARM64_VA_BITS_36

36-bit

CONFIG_ARM64_VA_BITS_40

40-bit

CONFIG_ARM64_VA_BITS_42

42-bit

CONFIG_ARM64_VA_BITS_48

48-bit

CONFIG_ARMV6_M_ARMV8_M_BASELINE

CONFIG_ARMV7_A

CONFIG_ARMV7_EXCEPTION_STACK_SIZE

Undefined Instruction and Abort stack size (in bytes)

CONFIG_ARMV7_FIQ_STACK_SIZE

FIQ stack size (in bytes)

CONFIG_ARMV7_M_ARMV8_M_FP

CONFIG_ARMV7_M_ARMV8_M_MAINLINE

CONFIG_ARMV7_R

CONFIG_ARMV7_R_FP

CONFIG_ARMV7_SVC_STACK_SIZE

SVC stack size (in bytes)

CONFIG_ARMV7_SYS_STACK_SIZE

SYS stack size (in bytes)

CONFIG_ARMV8_1_M_MAINLINE

CONFIG_ARMV8_1_M_MVEF

CONFIG_ARMV8_1_M_MVEI

CONFIG_ARMV8_A

CONFIG_ARMV8_A_NS

ARMv8-A Normal World (Non-Secure world of Trustzone)

CONFIG_ARMV8_M_BASELINE

CONFIG_ARMV8_M_DSP

CONFIG_ARMV8_M_MAINLINE

CONFIG_ARMV8_M_SE

CONFIG_ARMV8_R

CONFIG_ARM_AARCH32_MMU

ARMv7 Cortex-A MMU Support

CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER

CONFIG_ARM_ENTRY_VENEERS_LIB_NAME

Entry Veneers symbol file

CONFIG_ARM_FIRMWARE_HAS_SECURE_ENTRY_FUNCS

Secure Firmware has Secure Entry functions

CONFIG_ARM_FIRMWARE_USES_SECURE_ENTRY_FUNCS

Non-Secure Firmware uses Secure Entry functions

CONFIG_ARM_MMU

ARM MMU Support

CONFIG_ARM_MMU_NUM_L2_TABLES

Number of L2 translation tables available to the MMU

CONFIG_ARM_MMU_REGION_MIN_ALIGN_AND_SIZE

CONFIG_ARM_MPU

ARM MPU Support

CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE

CONFIG_ARM_NONSECURE_FIRMWARE

CONFIG_ARM_NONSECURE_PREEMPTIBLE_SECURE_CALLS

Allow secure function calls to be preempted

CONFIG_ARM_NSC_REGION_BASE_ADDRESS

ARM Non-Secure Callable Region base address

CONFIG_ARM_SECURE_BUSFAULT_HARDFAULT_NMI

BusFault, HardFault, and NMI target Secure state

CONFIG_ARM_SECURE_FIRMWARE

CONFIG_ARM_STACK_PROTECTION

CONFIG_ARM_STORE_EXC_RETURN

CONFIG_ARM_TRUSTZONE_M

ARM TrustZone-M support

CONFIG_ASSEMBLER_ISA_THUMB2

CONFIG_BIG_ENDIAN

CONFIG_BOARD

CONFIG_BUILTIN_STACK_GUARD

Thread Stack Guards based on built-in ARM stack limit checking

CONFIG_CACHE_MANAGEMENT

Enable cache management features

CONFIG_CMSIS_THREAD_MAX_STACK_SIZE

Max stack size threads can be allocated in CMSIS RTOS application

CONFIG_CMSIS_V2_THREAD_DYNAMIC_STACK_SIZE

Dynamic stack size threads are allocated in CMSIS RTOS V2 application

CONFIG_CMSIS_V2_THREAD_MAX_STACK_SIZE

Max stack size threads can be allocated in CMSIS RTOS V2 application

CONFIG_CODE_DATA_RELOCATION

Relocate code/data sections

CONFIG_CODE_DATA_RELOCATION_SRAM

Relocate code/data sections to SRAM

CONFIG_CODE_DENSITY

Code Density Option

CONFIG_COMPILER_ISA_THUMB2

Compile C/C++ functions using Thumb-2 instruction set

CONFIG_COMPRESSED_ISA

CONFIG_CORE_E31

Use E31 core

CONFIG_CORTEX_M_DWT

Enable and use the DWT

CONFIG_CORTEX_M_NULL_POINTER_EXCEPTION

CONFIG_CORTEX_M_NULL_POINTER_EXCEPTION_PAGE_SIZE

Size of paged unmapped to implement null pointer detection

CONFIG_CPU_AARCH32_CORTEX_A

CONFIG_CPU_AARCH64_CORTEX_R

CONFIG_CPU_APOLLO_LAKE

CONFIG_CPU_ARCEM

CONFIG_CPU_ARCHS

CONFIG_CPU_ATOM

CONFIG_CPU_CORTEX

CONFIG_CPU_CORTEX_A

CONFIG_CPU_CORTEX_A53

CONFIG_CPU_CORTEX_A72

CONFIG_CPU_CORTEX_A9

CONFIG_CPU_CORTEX_M

CONFIG_CPU_CORTEX_M0

CONFIG_CPU_CORTEX_M0PLUS

CONFIG_CPU_CORTEX_M0_HAS_VECTOR_TABLE_REMAP

CONFIG_CPU_CORTEX_M1

CONFIG_CPU_CORTEX_M23

CONFIG_CPU_CORTEX_M3

CONFIG_CPU_CORTEX_M33

CONFIG_CPU_CORTEX_M4

CONFIG_CPU_CORTEX_M55

CONFIG_CPU_CORTEX_M7

CONFIG_CPU_CORTEX_M_HAS_BASEPRI

CONFIG_CPU_CORTEX_M_HAS_CMSE

CONFIG_CPU_CORTEX_M_HAS_DWT

CONFIG_CPU_CORTEX_M_HAS_PROGRAMMABLE_FAULT_PRIOS

CONFIG_CPU_CORTEX_M_HAS_SPLIM

CONFIG_CPU_CORTEX_M_HAS_SYSTICK

CONFIG_CPU_CORTEX_M_HAS_VTOR

CONFIG_CPU_CORTEX_R

CONFIG_CPU_CORTEX_R4

CONFIG_CPU_CORTEX_R5

CONFIG_CPU_CORTEX_R7

CONFIG_CPU_CORTEX_R82

CONFIG_CPU_EM4

CONFIG_CPU_EM4_DMIPS

CONFIG_CPU_EM4_FPUDA

CONFIG_CPU_EM4_FPUS

CONFIG_CPU_EM6

CONFIG_CPU_HAS_DCLS

CONFIG_CPU_HAS_FPU

CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION

CONFIG_CPU_HAS_MMU

CONFIG_CPU_HAS_MPU

CONFIG_CPU_HAS_TEE

CONFIG_CPU_HS3X

CONFIG_CPU_HS6X

CONFIG_CPU_LAKEMONT

CONFIG_CPU_NIOS2_GEN2

CONFIG_CUSTOM_SECTION_ALIGN

Custom Section Align

CONFIG_CUSTOM_SECTION_MIN_ALIGN_SIZE

Custom Section Align Size

CONFIG_DCACHE_LINE_SIZE

d-cache line size

CONFIG_DCACHE_LINE_SIZE_DETECT

Detect d-cache line size at runtime

CONFIG_DEMAND_PAGING

Enable demand paging [EXPERIMENTAL]

CONFIG_DEMAND_PAGING_ALLOW_IRQ

Allow interrupts during page-ins/outs

CONFIG_DEMAND_PAGING_PAGE_FRAMES_RESERVE

Number of page frames reserved for paging

CONFIG_DEMAND_PAGING_STATS

Gather Demand Paging Statistics

CONFIG_DEMAND_PAGING_STATS_USING_TIMING_FUNCTIONS

Use Timing Functions to Gather Demand Paging Statistics

CONFIG_DEMAND_PAGING_THREAD_STATS

Gather per Thread Demand Paging Statistics

CONFIG_DEMAND_PAGING_TIMING_HISTOGRAM

Gather Demand Paging Execution Timing Histogram

CONFIG_DEMAND_PAGING_TIMING_HISTOGRAM_NUM_BINS

Number of bins (buckets) in Demand Paging Timing Histogrm

CONFIG_DISABLE_SSBD

Disable Speculative Store Bypass

CONFIG_DISABLE_TCM_ECC

Disable ECC on TCM

CONFIG_DYNAMIC_DIRECT_INTERRUPTS

Enable support for dynamic direct interrupts

CONFIG_DYNAMIC_INTERRUPTS

Enable installation of IRQs at runtime

CONFIG_DYNAMIC_OBJECTS

Allow kernel objects to be allocated at runtime

CONFIG_EAGER_FPU_SHARING

CONFIG_ENABLE_EXTENDED_IBRS

Enable Extended IBRS

CONFIG_EXCEPTION_DEBUG

Unhandled exception debugging information

CONFIG_EXTRA_EXCEPTION_INFO

Extra exception debug information

CONFIG_FAULT_DUMP

Fault dump level

CONFIG_FLASH_BASE_ADDRESS

Flash Base Address

CONFIG_FLASH_SIZE

Flash Size in kB

CONFIG_FLOAT_HARD

Enable hard-float calling convention

CONFIG_FP16

Half-precision floating point support

CONFIG_FP16_ALT

FP16 ARM alternative format

CONFIG_FP16_IEEE

FP16 IEEE format

CONFIG_FPU

Enable floating point unit (FPU)

CONFIG_FPU_SHARING

FPU register sharing

CONFIG_FP_FPU_DA

CONFIG_FP_HARDABI

Floating point Hard ABI

CONFIG_FP_SOFTABI

Floating point Soft ABI

CONFIG_GDT_DYNAMIC

Store GDT in RAM so that it can be modified

CONFIG_GEN_IRQ_START_VECTOR

CONFIG_GEN_IRQ_VECTOR_TABLE

Generate an interrupt vector table

CONFIG_GEN_ISR_TABLES

Use generated IRQ tables

CONFIG_GEN_PRIV_STACKS

CONFIG_GEN_SW_ISR_TABLE

Generate a software ISR table

CONFIG_GP_ALL_DATA

All data global pointer references

CONFIG_GP_GLOBAL

Global data global pointer references

CONFIG_GP_LOCAL

Local data global pointer references

CONFIG_GP_NONE

No global pointer

CONFIG_HARVARD

Harvard Architecture

CONFIG_HAS_ARCH_CACHE

Integrated cache controller

CONFIG_HAS_ARM_SMCCC

CONFIG_HAS_DIV_INSTRUCTION

CONFIG_HAS_EXTERNAL_CACHE

External cache controller

CONFIG_HAS_MULX_INSTRUCTION

CONFIG_HAS_MUL_INSTRUCTION

CONFIG_HW_STACK_PROTECTION

Hardware Stack Protection

CONFIG_ICACHE_LINE_SIZE

i-cache line size

CONFIG_ICACHE_LINE_SIZE_DETECT

Detect i-cache line size at runtime

CONFIG_IDLE_STACK_SIZE

Size of stack for idle thread

CONFIG_IDT_NUM_VECTORS

Number of IDT vectors

CONFIG_INCLUDE_RESET_VECTOR

Include Reset vector

CONFIG_INIT_ARCH_HW_AT_BOOT

Initialize internal architecture state at boot

CONFIG_IPM_CONSOLE_STACK_SIZE

Stack size for IPM console receiver thread

CONFIG_IRQ_OFFLOAD

Enable IRQ offload

CONFIG_IRQ_OFFLOAD_INTNUM

IRQ offload SW interrupt index

CONFIG_IRQ_OFFLOAD_VECTOR

IDT vector to use for IRQ offload

CONFIG_ISA_ARCV2

ARC ISA v2

CONFIG_ISA_ARCV3

ARC ISA v3

CONFIG_ISA_ARM

CONFIG_ISA_THUMB2

CONFIG_ISR_DEPTH

Maximum IRQ nesting depth

CONFIG_ISR_STACK_SIZE

ISR and initialization stack size (in bytes)

CONFIG_ISR_SUBSTACK_SIZE

Size of ISR substacks

CONFIG_KERNEL_VM_BASE

Virtual address space base address

CONFIG_KERNEL_VM_OFFSET

Kernel offset within address space

CONFIG_KERNEL_VM_SIZE

Size of kernel address space in bytes

CONFIG_KOBJECT_DATA_AREA_RESERVE_EXTRA_PERCENT

Reserve extra kobject data area (in percentage)

CONFIG_KOBJECT_RODATA_AREA_EXTRA_BYTES

Reserve extra bytes for kobject rodata area

CONFIG_KOBJECT_TEXT_AREA

Size of kobject text area

CONFIG_LAZY_FPU_SHARING

CONFIG_MAIN_STACK_SIZE

Size of stack for initialization and main thread

CONFIG_MAX_IRQ_LINES

Number of IRQ lines

CONFIG_MAX_THREAD_BYTES

Bytes to use when tracking object thread permissions

CONFIG_MAX_XLAT_TABLES

Maximum numbers of translation tables

CONFIG_MMU

Enable MMU features

CONFIG_MMU_PAGE_SIZE

Size of smallest granularity MMU page

CONFIG_MPU

Enable MPU features

CONFIG_MPU_ALLOW_FLASH_WRITE

Add MPU access to write to flash

CONFIG_MPU_GAP_FILLING

Force MPU to be filling in background memory regions

CONFIG_MPU_REQUIRES_NON_OVERLAPPING_REGIONS

CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT

CONFIG_MPU_STACK_GUARD

Thread Stack Guards

CONFIG_MPU_STACK_GUARD_MIN_SIZE_FLOAT

CONFIG_MULTIBOOT

Generate multiboot header

CONFIG_MULTIBOOT_FRAMEBUF

Multiboot framebuffer support

CONFIG_MULTIBOOT_FRAMEBUF_X

Multiboot framebuffer X pixels

CONFIG_MULTIBOOT_FRAMEBUF_Y

Multiboot framebuffer Y pixels

CONFIG_MULTIBOOT_INFO

Preserve multiboot information structure

CONFIG_MULTIBOOT_MEMMAP

Use multiboot memory map if provided

CONFIG_NESTED_INTERRUPTS

Enable nested interrupts

CONFIG_NET_RX_STACK_SIZE

RX thread stack size

CONFIG_NET_TX_STACK_SIZE

TX thread stack size

CONFIG_NIOS2

CONFIG_NOCACHE_MEMORY

Support for uncached memory

CONFIG_NO_UNUSED_STACK_INSPECTION

CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT

Use DWT for null pointer exception detection

CONFIG_NULL_POINTER_EXCEPTION_DETECTION_MPU

Use MPU for null pointer exception detection

CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE

Do not enable null pointer exception detection

CONFIG_NUM_IRQS

Upper limit of interrupt numbers/IDs used

CONFIG_NUM_IRQ_PRIO_LEVELS

Number of supported interrupt priority levels

CONFIG_PCIE_MMIO_CFG

Use MMIO PCI configuration space access

CONFIG_PIC_DISABLE

Disable PIC

CONFIG_PLATFORM_SPECIFIC_INIT

Enable platform (SOC) specific startup hook

CONFIG_PMP_POWER_OF_TWO_ALIGNMENT

Enable power of two alignment

CONFIG_PMP_SLOT

Number of PMP slot

CONFIG_PMP_STACK_GUARD

Thread Stack Guard

CONFIG_PMP_STACK_GUARD_MIN_SIZE

Guard size

CONFIG_PRIVILEGED_STACK_SIZE

Size of privileged stack

CONFIG_REBOOT_RST_CNT

Reboot via RST_CNT register

CONFIG_RESET_VECTOR_IN_BOOTLOADER

Link reset vector into bootloader

CONFIG_RGF_NUM_BANKS

Number of General Purpose Register Banks

CONFIG_RISCV

CONFIG_RISCV_GENERIC_TOOLCHAIN

Compile using generic riscv32 toolchain

CONFIG_RISCV_GP

Enable RISC-V global pointer relative addressing

CONFIG_RISCV_HAS_CPU_IDLE

Does SOC has CPU IDLE instruction

CONFIG_RISCV_PMP

RISC-V PMP Support

CONFIG_RISCV_SOC_CONTEXT_SAVE

Enable SOC-based context saving in IRQ handlers

CONFIG_RISCV_SOC_INTERRUPT_INIT

Enable SOC-based interrupt initialization

CONFIG_RISCV_SOC_OFFSETS

Enable SOC-based offsets

CONFIG_RUNTIME_NMI

Attach an NMI handler at runtime

CONFIG_SCHED_IPI_VECTOR

IDT vector to use for scheduler IPI

CONFIG_SET_GDT

Setup GDT as part of boot process

CONFIG_SIMULATOR_XTENSA

Simulator Configuration

CONFIG_SJLI_TABLE_SIZE

SJLI table size

CONFIG_SOC

CONFIG_SOC_FAMILY

CONFIG_SOC_SERIES

CONFIG_SPARC

CONFIG_SPARC_CASA

CASA instructions

CONFIG_SPARC_NWIN

Number of register windows

CONFIG_SRAM_BASE_ADDRESS

SRAM Base Address

CONFIG_SRAM_OFFSET

Kernel SRAM offset

CONFIG_SRAM_REGION_PERMISSIONS

Assign appropriate permissions to kernel areas in SRAM

CONFIG_SRAM_SIZE

SRAM Size in kB

CONFIG_SSE

SSE registers

CONFIG_SSE_FP_MATH

Compiler-generated SSEx instructions

CONFIG_STACK_ALIGN_DOUBLE_WORD

Align stacks on double-words (8 octets)

CONFIG_STACK_GROWS_UP

Stack grows towards higher memory addresses

CONFIG_SW_VECTOR_RELAY

Enable Software Vector Relay

CONFIG_SW_VECTOR_RELAY_CLIENT

Enable Software Vector Relay (client)

CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE

System workqueue stack size

CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC

Hardware clock cycles per second, 2000000 for ISS

CONFIG_TEST_EXTRA_STACKSIZE

Test function extra thread stack size

CONFIG_TLB_IPI_VECTOR

IDT vector to use for TLB shootdown IPI

CONFIG_TOOLCHAIN_HAS_BUILTIN_FFS

CONFIG_TRUSTED_EXECUTION_NONSECURE

Trusted Execution: Non-Secure firmware image

CONFIG_TRUSTED_EXECUTION_SECURE

Trusted Execution: Secure firmware image

CONFIG_USERSPACE

User mode threads

CONFIG_X86

CONFIG_X86_64

Run in 64-bit mode

CONFIG_X86_BOUNDS_CHECK_BYPASS_MITIGATION

CONFIG_X86_COMMON_PAGE_TABLE

Use a single page table for all threads

CONFIG_X86_CPU_HAS_MMX

CONFIG_X86_CPU_HAS_SSE

CONFIG_X86_CPU_HAS_SSE2

CONFIG_X86_CPU_HAS_SSE3

CONFIG_X86_CPU_HAS_SSE41

CONFIG_X86_CPU_HAS_SSE42

CONFIG_X86_CPU_HAS_SSE4A

CONFIG_X86_CPU_HAS_SSSE3

CONFIG_X86_DYNAMIC_IRQ_STUBS

Number of dynamic interrupt stubs

CONFIG_X86_ENABLE_TSS

CONFIG_X86_EXCEPTION_STACK_SIZE

Size of the exception stack(s)

CONFIG_X86_EXCEPTION_STACK_TRACE

CONFIG_X86_EXTRA_PAGE_TABLE_PAGES

Reserve extra pages in page table

CONFIG_X86_FP_USE_SOFT_FLOAT

Use Software Floating Point Operations

CONFIG_X86_KPTI

Enable kernel page table isolation

CONFIG_X86_MAX_ADDITIONAL_MEM_DOMAINS

Maximum number of memory domains

CONFIG_X86_MEMMAP

Use memory map

CONFIG_X86_MEMMAP_ENTRIES

Number of memory map entries

CONFIG_X86_MFENCE_INSTRUCTION_SUPPORTED

X86 MFENCE instruction supported

CONFIG_X86_MMU

Enable Memory Management Unit

CONFIG_X86_MMX

Enable MMX Support

CONFIG_X86_NO_LAZY_FP

CONFIG_X86_NO_MELTDOWN

CONFIG_X86_NO_SPECTRE_V1

CONFIG_X86_NO_SPECTRE_V2

CONFIG_X86_NO_SPECTRE_V4

CONFIG_X86_NO_SPECULATIVE_VULNERABILITIES

CONFIG_X86_PAE

Use PAE page tables

CONFIG_X86_PC_COMPATIBLE

CONFIG_X86_SSE

Enable SSE Support

CONFIG_X86_SSE2

Enable SSE2 Support

CONFIG_X86_SSE3

Enable SSE3 Support

CONFIG_X86_SSE41

Enable SSE4.1 Support

CONFIG_X86_SSE42

Enable SSE4.2 Support

CONFIG_X86_SSE4A

Enable SSE4A Support

CONFIG_X86_SSE_FP_MATH

Compiler-generated SSEx instructions for floating point math

CONFIG_X86_SSSE3

Enable SSSE3 (Supplemental SSE3) Support

CONFIG_X86_STACK_PROTECTION

CONFIG_X86_USERSPACE

CONFIG_X86_USE_THREAD_LOCAL_STORAGE

CONFIG_X86_VERY_EARLY_CONSOLE

Support very early boot printk

CONFIG_XIP

Execute in place

CONFIG_XTENSA

CONFIG_XTENSA_CPU_IDLE_SPIN

Use busy loop for k_cpu_idle

CONFIG_XTENSA_ENABLE_BACKTRACE

Enable backtrace on panic exception

CONFIG_XTENSA_KERNEL_CPU_PTR_SR

CONFIG_XTENSA_NO_IPC

Core has no IPC support

CONFIG_XTENSA_RESET_VECTOR

Build reset vector code

CONFIG_XTENSA_SMALL_VECTOR_TABLE_ENTRY

Enable workaround for small vector table entries

CONFIG_XTENSA_USE_CORE_CRT1

Use crt1.S from core

CONFIG_XTENSA_WAITI_BUG

Enable workaround sequence for WAITI bug on LX6

CONFIG_ZERO_LATENCY_IRQS

Enable zero-latency interrupts