The latest development version of this page may be more current than this released 1.14.0 version.
CONFIG_I2S_STM32_PLLI2S_PLLM

Division factor for PLLI2S VCO input clock

Type: int

Help

Division factor for the audio PLL (PLLI2S) VCO input clock. PLLM factor should be selected to ensure that the VCO input frequency ranges from 1 to 2 MHz. It is recommended to select a frequency of 2 MHz to limit PLL jitter. Allowed values: 2-63

Direct dependencies

(I2S && BOARD_96B_ARGONKEY) || (I2S_STM32_USE_PLLI2S_ENABLE && I2S_STM32 && I2S)

(Includes any dependencies from if’s and menus.)

Kconfig definitions

At boards/arm/96b_argonkey/Kconfig.defconfig:58

Included via Kconfig:10Kconfig.zephyr:21

Menu path: (top menu)

config I2S_STM32_PLLI2S_PLLM
    int
    default 8 if I2S && BOARD_96B_ARGONKEY
    depends on I2S && BOARD_96B_ARGONKEY

At drivers/i2s/Kconfig.stm32:32

Included via Kconfig:10Kconfig.zephyr:35drivers/Kconfig:40drivers/i2s/Kconfig:29

Menu path: (top menu) → Device Drivers → I2S bus drivers → STM32 MCU I2S controller driver

config I2S_STM32_PLLI2S_PLLM
    int
    prompt "Division factor for PLLI2S VCO input clock" if I2S_STM32_USE_PLLI2S_ENABLE && I2S_STM32 && I2S
    range 2 63 if I2S_STM32_USE_PLLI2S_ENABLE && I2S_STM32 && I2S
    default 8 if I2S_STM32_USE_PLLI2S_ENABLE && I2S_STM32 && I2S
    depends on I2S_STM32_USE_PLLI2S_ENABLE && I2S_STM32 && I2S
    help
      Division factor for the audio PLL (PLLI2S) VCO input clock.
      PLLM factor should be selected to ensure that the VCO
      input frequency ranges from 1 to 2 MHz. It is recommended
      to select a frequency of 2 MHz to limit PLL jitter.
      Allowed values: 2-63

(Definitions include propagated dependencies, including from if’s and menus.)