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CONFIG_SOC_ATMEL_SAME70_PLLA_DIVA¶
PLL DIVA
Type: int
Help¶
This is the divider DIVA used by the PLL. The processor clock is (MAINCK * (MULA + 1) / DIVA).
Board config file can override this settings for a particular board.
Setting DIVA=0 would disable PLL at boot, this is currently not supported.
With default of MULA == 24, and DIVA == 1, PLL is running at 25 times the main clock frequency.
Direct dependencies¶
SOC_SERIES_SAME70 && SOC_FAMILY_SAM
(Includes any dependencies from if’s and menus.)
Defaults¶
- 1 if
SOC_SERIES_SAME70&&SOC_FAMILY_SAM
Kconfig definition¶
At soc/arm/atmel_sam/same70/Kconfig.soc:95
Included via Kconfig:10 → Kconfig.zephyr:27 → soc/Kconfig:12 → soc/arm/atmel_sam/Kconfig:18
Menu path: (top menu) → Hardware Configuration
config SOC_ATMEL_SAME70_PLLA_DIVA
int
prompt "PLL DIVA" if SOC_SERIES_SAME70 && SOC_FAMILY_SAM
range 1 255 if SOC_SERIES_SAME70 && SOC_FAMILY_SAM
default 1 if SOC_SERIES_SAME70 && SOC_FAMILY_SAM
depends on SOC_SERIES_SAME70 && SOC_FAMILY_SAM
help
This is the divider DIVA used by the PLL.
The processor clock is (MAINCK * (MULA + 1) / DIVA).
Board config file can override this settings
for a particular board.
Setting DIVA=0 would disable PLL at boot, this is currently
not supported.
With default of MULA == 24, and DIVA == 1,
PLL is running at 25 times the main clock frequency.
(Definitions include propagated dependencies, including from if’s and menus.)