External Module Configuration Options¶
Kconfig
files describe build-time configuration options (called symbols
in Kconfig-speak), how they’re grouped into menus and sub-menus, and
dependencies between them that determine what configurations are valid.
Kconfig
files appear throughout the directory tree. For example,
subsys/power/Kconfig
defines power-related options.
This documentation is generated automatically from the Kconfig
files by
the gen_kconfig_rest.py
script. Click on symbols for more
information.
Configuration Options¶
Symbol name |
Help/prompt |
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Add MBEDTLS header files to the ‘app’ include path. It may be disabled if the include paths for MBEDTLS are causing aliasing issues for ‘app’. |
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When enabled, this option instructs the Zephyr build process to additionaly generate a TF-M image for the Secure Execution environment, along with the Zephyr image. The Zephyr image itself is to be executed in the Non-Secure Processing Environment. The required dependency on TRUSTED_EXECUTION_NONSECURE ensures that the Zephyr image is built as a Non-Secure image. Both TF-M and Zephyr images, as well as the veneer object file that links them, are generated during the normal Zephyr build process.
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This option enables the CANopenNode library. |
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This option specifies whether a check user exists for a cbor encoder. |
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This option enables floating point support. |
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This option enables half float type support. |
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This option specifies max recursions for the parser. |
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This option enables the strict parser checks. |
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This option enables cbor_value_to_pretty_stream function. |
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This option enables open memstream support. |
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This option enables the civetweb HTTP API. |
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CMSIS-DSP Library Support |
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This option prefers autovectorizable code to one using C intrinsics in the DSP functions. |
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This option enables the Basic Math Functions, which support the following operations:
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This option enables the Bayesian Estimator Functions, which implements the naive gaussian Bayes estimator. |
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This option enables the Complex Math Functions, which support the following operations:
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This option enables the Controller Functions, which support the following operations:
These functions can be used to implement a generic PID controller, as well as field oriented motor control using Space Vector Modulation algorithm. |
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This option enables the Distance Functions, which support the following distance computation algorithms:
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This option enables the Fast Math Functions, which support the following operations:
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This option enables the Filtering Functions, which support the following operations:
The following filter types are supported:
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This option enables manual loop unrolling in the DSP functions. |
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This option enables the Matrix Functions, which support the following operations:
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This option enables validation of the input and output sizes of matrices. |
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This option enables the NEON Advanced SIMD instruction set, which is available on most Cortex-A and some Cortex-R processors. |
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This option enables rounding on the support functions. |
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This option enables the Statistics Functions, which support the following operations:
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This option enables the Support Functions, which support the following operations:
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This option enables the Support Vector Machine Functions, which support the following algorithms:
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This option enables the static look-up tables used by the DSP functions to compute results. |
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Include all fast interpolation tables |
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Include all FFT tables |
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cmplx mag q15 |
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cmplx mag q31 |
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cos f32 |
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cos q15 |
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cos q31 |
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lms norm q15 |
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lms norm q31 |
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sin cos f32 |
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sin cos q31 |
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sin f32 |
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sin q15 |
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sin q31 |
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cfft f32 1024 |
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cfft f32 128 |
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cfft f32 16 |
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cfft f32 2048 |
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cfft f32 256 |
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cfft f32 32 |
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cfft f32 4096 |
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cfft f32 512 |
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cfft f32 64 |
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cfft f64 1024 |
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cfft f64 128 |
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cfft f64 16 |
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cfft f64 2048 |
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cfft f64 256 |
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cfft f64 32 |
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cfft f64 4096 |
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cfft f64 512 |
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cfft f64 64 |
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cfft q15 1024 |
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cfft q15 128 |
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cfft q15 16 |
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cfft q15 2048 |
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cfft q15 256 |
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cfft q15 32 |
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cfft q15 4096 |
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cfft q15 512 |
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cfft q15 64 |
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cfft q31 1024 |
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cfft q31 128 |
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cfft q31 16 |
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cfft q31 2048 |
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cfft q31 256 |
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cfft q31 32 |
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cfft q31 4096 |
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cfft q31 512 |
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cfft q31 64 |
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dct4 f32 128 |
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dct4 f32 2048 |
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dct4 f32 512 |
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dct4 f32 8192 |
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dct4 q15 128 |
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dct4 q15 2048 |
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dct4 q15 512 |
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dct4 q15 8192 |
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dct4 q31 128 |
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dct4 q31 2048 |
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dct4 q31 512 |
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dct4 q31 8192 |
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rfft f32 128 |
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rfft f32 2048 |
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rfft f32 512 |
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rfft f32 8192 |
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rfft f64 128 |
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rfft f64 2048 |
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rfft f64 512 |
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rfft f64 8192 |
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rfft fast f32 1024 |
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rfft fast f32 128 |
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rfft fast f32 2048 |
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rfft fast f32 256 |
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rfft fast f32 32 |
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rfft fast f32 4096 |
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rfft fast f32 512 |
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rfft fast f32 64 |
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rfft fast f64 1024 |
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rfft fast f64 128 |
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rfft fast f64 2048 |
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rfft fast f64 256 |
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rfft fast f64 32 |
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rfft fast f64 4096 |
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rfft fast f64 512 |
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rfft fast f64 64 |
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rfft q15 1024 |
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rfft q15 128 |
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rfft q15 2048 |
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rfft q15 256 |
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rfft q15 32 |
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rfft q15 4096 |
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rfft q15 512 |
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rfft q15 64 |
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rfft q15 8192 |
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rfft q31 1024 |
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rfft q31 128 |
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rfft q31 2048 |
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rfft q31 256 |
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rfft q31 32 |
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rfft q31 4096 |
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rfft q31 512 |
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rfft q31 64 |
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rfft q31 8192 |
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This option enables the Transform Functions, which support the following transformations:
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Altera HAL drivers support |
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Set if the EPIT module is present in the SoC. |
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Set if the GPIO module is present in the SoC. |
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Set if the I2C module is present in the SoC. |
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Set if the ACMP module is present on the SoC. |
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Set if the 12-bit ADC (ADC12) module is present in the SoC. |
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Set if the 16-bit ADC (ADC16) module is present in the SoC. |
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Set if the L1 or L2 cache is present in the SoC. |
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Set if the clock control module (CCM) module is present in the SoC. |
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Set if the CMOS Sensor Interface module is present in the SoC. |
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Set if the Digital-to-Analog (DAC) module is present in the SoC. |
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Set if the Digital-to-Analog (DAC32) module is present in the SoC. |
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Set if the EDMA module is present on the SoC. |
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Set if the enhanced LCD interface (eLCDIF) module is present in the SoC. |
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Set if the ethernet (ENET) module is present in the SoC. |
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Set if the FlexCAN module is presents in the SoC. |
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Set if the flexcomm (FLEXCOMM) module is present in the SoC. |
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Set if the flexible SPI (FlexSPI) module is present in the SoC. |
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Set if the flash memory (FTFA, FTFE, or FTFL) module is present in the SoC. |
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Set if the FlexTimer (FTM) module is present in the SoC. |
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Set if the general purpose timer (GPT) module is present in the SoC. |
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Set if the flash memory In Applcation Programming is present in the LPC55xxx family SoCs. |
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Set if the flash memory In Applcation Programming is present in the older LPC family SoCs (LPC54xxx, LPC11xxx). |
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Set if the iMX GPIO (IGPIO) module is present in the SoC. |
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Set if the LPADC module is present in the SoC. |
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Set if the DMA module is present on the SoC. |
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Set if the low power I2C (LPI2C) module is present in the SoC. |
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Set if the low power uart (LPSCI) module is present in the SoC. |
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Set if the low power SPI (LPSPI) module is present in the SoC. |
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Set if the Low Power Timer (LPTMR) module is present in the SoC. |
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Set if the low power uart (LPUART) module is present in the SoC. |
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Set if the peripheral clock controller module (PCC) module is present in the SoC. |
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Set if the PIT module is present on the SoC. |
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Set if the PWM module is present in the SoC. |
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Set if the PWT module is present on the SoC. |
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Set if the RDC module is present in the SoC. |
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Set if the LPC specific random number generator (RNG) module is present in the SoC. |
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Set if the random number generator accelerator (RNGA) module is present in the SoC. |
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Set if the real time clock (RTC) modules is present in the SoC. |
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Set if the system clock generator (SCG) module is present in the SoC. |
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Set if the smart external memory controller (SEMC) module is present in the SoC. |
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Set if the system integration module (SIM) module is present in the SoC. |
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Set if the SMC module is present in the SoC. |
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Set if the syscon module is present in the SoC. |
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Set if the Timer/PWM Module is present in the SoC |
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Set if the true random number generator (TRNG) module is present in the SoC. |
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Set if the USB controller EHCI module is present in the SoC. |
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Set if the USDHC instance 1 module is present in the SoC. |
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Set if the USDHC2 instance 2 module is present in the SoC. |
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Set if the watchdog (WDOG32) module is present in the SoC. |
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Set if the watchdog (WWDT) module is present in the SoC. |
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Microchip MEC HAL drivers support |
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Enable Nuvoton Universal asynchronous receiver transmitter HAL module driver |
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Set if the flash memory (FTFA, FTFE, or FTFL) module is present in the SoC. |
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Set if the low power i2c (LPI2C) module is present in the SoC. |
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Set if the low power spi (LPSPI) module is present in the SoC. |
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Set if the low power uart (LPUART) module is present in the SoC. |
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Set if the Timer/PWM (TPM) module is present in the SoC. |
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This option enables the use of Semtech’s LoRaMac stack |
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This option enables the use of Semtech’s Radio drivers |
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This option enables the use of Semtech’s Secure Element software implementation |
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Enable XMCLIB Universal asynchronous receiver transmitter (UART) |
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This option enables the libmetal HAL abstraction layer |
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This option specifies the path to the source for the libmetal library |
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This option enables the mbedTLS cryptography library. |
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Use precomputed AES tables stored in ROM. |
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Link with mbedTLS sources included with Zephyr distribution. Included mbedTLS version is well integrated with and supported by Zephyr, and the recommended choice for most users. |
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Use a specific mbedTLS configuration file. The default config file file can be tweaked with Kconfig. The default configuration is suitable to communicate with majority of HTTPS servers on the Internet, but has relatively many features enabled. To optimize resources for special TLS usage, use available Kconfig options, or select an alternative config. |
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Enable the ChaCha20-Poly1305 AEAD algorithm |
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Enable the generic cipher layer. |
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Enable the AES block cipher |
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Enable all available ciphers |
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Enable the ARC4 stream cipher |
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Enable the Blowfish block cipher |
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Enable the Camellia block cipher |
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Enable the Counter with CBC-MAC (CCM) mode for 128-bit block cipher |
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Enable the ChaCha20 stream cipher |
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Enable the DES block cipher |
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Enable the Galois/Counter Mode (GCM) for AES |
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Enable Cipher Block Chaining mode (CBC) for symmetric ciphers |
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Enable Counter Block Cipher mode (CTR) for symmetric ciphers. |
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Enable Xor-encrypt-xor with ciphertext stealing mode (XTS) for AES |
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Enable the CTR_DRBG AES-256-based random generator |
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Enable debugging activation for mbed TLS configuration. If you use mbedTLS/Zephyr integration (e.g. net_app), this will activate debug logging (of the level configured by MBEDTLS_DEBUG_LEVEL). If you use mbedTLS directly instead, you will need to perform additional configuration yourself: call mbedtls_ssl_conf_dbg(&mbedtls.conf, my_debug, NULL); mbedtls_debug_set_threshold(level); functions in your application, and create the my_debug() function to actually print something useful. |
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Default mbed TLS debug logging level for Zephyr integration code (from ext/lib/crypto/mbedtls/include/mbedtls/debug.h): 0 No debug 1 Error 2 State change 3 Information 4 Verbose |
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Enable support for DTLS |
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Enable deterministic ECDSA (RFC 6979) |
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Enable all available elliptic curves |
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Enable BP256R1 elliptic curve |
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Enable BP384R1 elliptic curve |
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Enable BP512R1 elliptic curve |
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Enable CURVE25519 elliptic curve |
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Enable CURVE448 elliptic curve |
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Enable SECP192K1 elliptic curve |
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Enable SECP192R1 elliptic curve |
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Enable SECP224K1 elliptic curve |
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Enable SECP224R1 elliptic curve |
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Enable SECP256K1 elliptic curve |
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Enable SECP256R1 elliptic curve |
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Enable SECP384R1 elliptic curve |
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Enable SECP521R1 elliptic curve |
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Enable NSIT curves optimization |
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This option enables the mbedtls to use the heap. This setting must be global so that various applications and libraries in Zephyr do not try to do this themselves as there can be only one heap defined in mbedtls. If this is enabled, then the Zephyr will, during the device startup, initialize the heap automatically. |
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Enable mbedTLS generic entropy pool |
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Enable the prime-number generation code. |
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Enable use of assembly code in mbedTLS. This improves the performances of asymmetric cryptography, however this might have an impact on the code size. |
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The mbedtls routines will use this heap if enabled. See ext/lib/crypto/mbedtls/include/mbedtls/config.h and MBEDTLS_MEMORY_BUFFER_ALLOC_C option for details. That option is not enabled by default. Default value for the heap size is not set as it depends on the application. For streaming communication with arbitrary (HTTPS) servers on the Internet, 32KB + overheads (up to another 20KB) may be needed. For some dedicated and specific usage of mbedtls API, the 1000 bytes might be ok. |
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Enable the HMAC_DRBG random generator |
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This option holds the path where the mbedTLS libraries and headers are installed. Make sure this option is properly set when MBEDTLS_LIBRARY is enabled otherwise the build will fail. |
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Enable all available ciphersuite modes |
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Enable the DHE-PSK based ciphersuite modes |
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Enable the DHE-RSA based ciphersuite modes |
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Enable the ECDHE-ECDSA based ciphersuite modes |
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Enable the ECDHE-PSK based ciphersuite modes |
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Enable the ECDHE-RSA based ciphersuite modes |
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Enable the ECDH-ECDSA based ciphersuite modes |
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Enable the ECDH-RSA based ciphersuite modes |
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Enable the ECJPAKE based ciphersuite modes |
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Enable the PSK based ciphersuite modes |
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Enable the RSA-only based ciphersuite modes |
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Enable the RSA-PSK based ciphersuite modes |
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Use external, out-of-tree prebuilt mbedTLS library. For advanced users only. |
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Enable all available MAC methods |
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Enable the CMAC (Cipher-based Message Authentication Code) mode for block ciphers. |
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Enable the MD4 hash algorithm |
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Enable the MD5 hash algorithm |
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Enable the Poly1305 MAC algorithm |
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Enable the SHA1 hash algorithm |
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Enable the SHA-224 and SHA-256 hash algorithms |
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Enable the SHA-384 and SHA-512 hash algorithms |
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Enable the generic message digest layer. |
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Enable debugging of buffer allocator memory issues. Automatically prints (to stderr) all (fatal) messages on memory allocation issues. Enables function for ‘debug output’ of allocated memory. |
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Enable some OpenThread specific mbedTLS optimizations that allows to save some RAM/ROM when OpenThread is used. Note, that when application aims to use other mbedTLS services on top of OpenThread (e.g. secure sockets), it’s advised to disable this option. |
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By default only DER (binary) format of certificates is supported. Enable this option to enable support for PEM format. |
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Enable this to support RFC 6066 server name indication (SNI) in SSL. This requires that MBEDTLS_X509_CRT_PARSE_C is also set. |
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Enable an implementation of SHA-256 that has lower ROM footprint but also lower performance |
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Enable support for setting the supported Application Layer Protocols |
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Enable support for exporting SSL key block and master secret |
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The TLS standards mandate max payload size of 16384 bytes. So, for maximum operability and for general-purpose usage, that value must be used. For specific usages, that value can be largely decreased. E.g. for DTLS, payload size is limited by UDP datagram size, and even for HTTPS REST API, the payload can be limited to max size of (REST request, REST response, server certificate(s)). mbedTLS uses this value separate for input and output buffers, so twice this value will be allocated (on mbedTLS own heap, so the value of MBEDTLS_HEAP_SIZE should accommodate that). |
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Enable self test function for the crypto algorithms |
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Enable support for TLS 1.0 |
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Enable support for TLS 1.1 (DTLS 1.0) |
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Enable support for TLS 1.2 (DTLS 1.2) |
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Enable user mbedTLS config file that will be included at the end of the generic config file. |
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User config file that can contain mbedTLS configs that were not covered by the generic config file. |
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Enable MCUboot utility library which implements functions required by the chain-loaded application and the MCUboot. |
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This option enables the MIPI SyS-T Library |
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This option outputs MIPI SyS-T raw data packet |
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This option enables support for the STP Transport Layer for MIPI SyS-T |
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Enable ADC driver |
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Enable CLOCK driver |
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Enable two stage start sequence of the low frequency clock |
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Enable COMP driver |
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Enable DPPI allocator |
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Enable EGU driver |
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Enable EGU0 instance |
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Enable EGU1 instance |
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Enable EGU2 instance |
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Enable EGU3 instance |
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Enable EGU4 instance |
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Enable EGU5 instance |
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Enable GPIOTE driver |
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Enable I2S driver |
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Enable IPC driver |
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Enable LPCOMP driver |
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Enable NFCT driver |
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Enable NVMC driver |
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Enable PDM driver |
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Enable POWER driver |
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Enable PPI allocator |
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Enable Peripheral Resource Sharing module |
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Enable PRS box 0 |
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Enable PRS box 1 |
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Enable PRS box 2 |
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Enable PRS box 3 |
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Enable PRS box 4 |
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Enable PWM driver |
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Enable PWM0 instance |
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Enable PWM1 instance |
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Enable PWM2 instance |
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Enable PWM3 instance |
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Enable QDEC driver |
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Enable QSPI driver |
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Enable RNG driver |
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Enable RTC driver |
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Enable RTC0 instance |
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Enable RTC1 instance |
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Enable RTC2 instance |
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Enable SAADC driver |
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Enable SPI driver |
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Enable SPI0 instance |
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Enable SPI1 instance |
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Enable SPI2 instance |
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Enable SPIM driver |
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Enable SPIM0 instance |
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Enable SPIM1 instance |
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Enable SPIM2 instance |
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Enable SPIM3 instance |
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Enable SPIM4 instance |
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Enable SPIS driver |
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Enable SPIS0 instance |
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Enable SPIS1 instance |
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Enable SPIS2 instance |
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Enable SPIS3 instance |
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Enable SYSTICK driver |
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Enable TEMP driver |
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Enable TIMER driver |
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Enable TIMER0 instance |
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Enable TIMER1 instance |
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Enable TIMER2 instance |
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Enable TIMER3 instance |
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Enable TIMER4 instance |
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Enable TWI driver |
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Enable TWI0 instance |
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Enable TWI1 instance |
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Enable TWIM driver |
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Enable TWIM0 instance |
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Enable TWIM1 instance |
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Enable TWIM2 instance |
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Enable TWIM3 instance |
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Enable TWIS driver |
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Enable TWIS0 instance |
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Enable TWIS1 instance |
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Enable TWIS2 instance |
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Enable TWIS3 instance |
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Enable UART driver |
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Enable UART0 instance |
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Enable UARTE driver |
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Enable UARTE0 instance |
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Enable UARTE1 instance |
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Enable UARTE2 instance |
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Enable UARTE3 instance |
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Enable USBD driver |
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Enable USBREG driver |
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Enable WDT driver |
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Enable support for nrfx WDT instance 0. |
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Enable support for nrfx WDT instance 1. |
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Limit for occurrences above correlator threshold. When not equal to zero the correlator based signal detect is enabled. |
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nRF IEEE 802.15.4 CCA Correlator threshold |
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If energy detected in a given channel is above the value then the channel is deemed busy. The unit is defined as per 802.15.4-2006 spec. |
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Carrier Seen |
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Energy Above Threshold AND Carrier Seen |
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Energy Above Threshold OR Carrier Seen |
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Energy Above Threshold |
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In dynamic multiprotocol applications, access to the radio peripheral must be distributed by an arbiter. To support this arbitration in the driver, this option must be enabled. Otherwise, the driver assumes that access to the radio peripheral is granted indefinitely. |
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Number of slots containing extended addresses of nodes for which pending data is stored |
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Number of slots containing short addresses of nodes for which pending data is stored |
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This option enables nRF IEEE 802.15.4 radio driver in Zephyr. Note, that beside the radio peripheral itself, this drivers occupies several other peripherals. A complete list can be found in the hal_nordic repository, within drivers/nrf_radio_802154/nrf_802154_peripherals.h file. As the nRF IEEE 802.15.4 radio driver defines IRQ configuration abstraction layer API and its Zephyr-specific implementation uses dynamic interrupts, the DYNAMIC_INTERRUPTS switch is selected unconditionally. |
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Number of buffers in nRF 802.15.4 driver receive queue. If this value is modified, its serialization host counterpart must be set to the exact same value. |
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This option specifies if buffers for 802.15.4 serialization are allocated in a thread-safe manner. |
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This option specifies default timeout of spinel status response in milliseconds. |
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Enable serialization of nRF IEEE 802.15.4 Driver. This option is to be used if radio is not available in the core, but radio services are provided by a serialization backend. |
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This option enable debug logs of 802.15.4 serialization module. |
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Enable serialization of nRF IEEE 802.15.4 Driver. This option is to be used if radio is available in the core to provide radio services over a serialization backend. |
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Set the initialization priority number. Do not mess with it unless you know what you are doing. |
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nRF IEEE 802.15.4 Open source Service Layer |
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This option enables the OpenAMP IPC library |
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This option enables support for OpenAMP VirtIO Master |
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This option enables support for OpenAMP VirtIO Slave |
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This option specifies the path to the source for the open-amp library |
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By default BL2 header size in TF-M is 0x400. ROM_START_OFFSET needs to be updated if TF-M switches to use a different header size for BL2. |
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Build the SimpleLink host driver |
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Build Sound Open Firmware (SOF) support. |
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This option does not set -DBL2 in TFM, which means the TF-M platform’s default is used. Currently all TF-M platforms have BL2=ON as default. |
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TFM BL2 disabled |
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TFM BL2 enabled |
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The board name used for building TFM. Building with TFM requires that TFM has been ported to the given board/SoC. |
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When enabled, this option signifies that the TF-M build supports the PSA API (IPC mode) instead of the secure library mode. |
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Manually set the required TFM isolation level. Possible values are 1,2 or 3; the default is set by build configuration. |
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The path and filename for the .pem file containing the private key that should be used by the BL2 bootloader when signing non-secure firmware images. |
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The path and filename for the .pem file containing the private key that should be used by the BL2 bootloader when signing secure firmware images. |
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Build profile used to build tfm_s image. The available values are profile_medium and profile_small. The default profile does not need to have this configuration set. |
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When enabled, this option signifies that the TF-M build includes the Secure and the Non-Secure regression tests. |
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This option enables the tinyCBOR library. |
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This option enables the TinyCrypt cryptography library. |
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This option enables support for AES-128 decrypt and encrypt. |
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This option enables support for AES-128 block cipher mode. |
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This option enables support for AES-128 CCM mode. |
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This option enables support for AES-128 CMAC mode. |
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This option enables support for AES-128 counter mode. |
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This option enables support for the pseudo-random number generator in counter mode. |
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This option enables support for the Elliptic curve Diffie-Hellman anonymous key agreement protocol. Enabling ECC requires a cryptographically secure random number generator. |
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This option enables support for the Elliptic Curve Digital Signature Algorithm (ECDSA). Enabling ECC requires a cryptographically secure random number generator. |
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This option enables support for SHA-256 hash function primitive. |
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This option enables support for HMAC using SHA-256 message authentication code. |
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This option enables support for pseudo-random number generator. |
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Enable STM32Cube Analog-to-Digital Converter (ADC) HAL module driver |
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Enable STM32Cube Extended Analog-to-Digital Converter (ADC) HAL module driver |
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Enable STM32Cube Controller Area Network (CAN) HAL module driver |
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Enable STM32Cube HDMI-CEC controller (CEC) HAL module driver |
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Enable STM32Cube Ultra Low Power Comparator channels (COMP) HAL module driver |
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Enable STM32Cube CORTEX HAL module driver |
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Enable STM32Cube Cyclic redundancy check calculation unit (CRC) HAL module driver |
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Enable STM32Cube Extended Cyclic redundancy check calculation unit (CRC) HAL module driver |
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Enable STM32Cube Cryptographic processor (CRYP) HAL module driver |
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Enable STM32Cube Extended Cryptographic processor (CRYP) HAL module driver |
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Enable STM32Cube Digital-to-analog converter (DAC) HAL module driver |
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Enable STM32Cube Extended Digital-to-analog converter (DAC) HAL module driver |
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Enable STM32Cube Digital camera interface (DCM) HAL module driver |
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Enable STM32Cube Extended Digital camera interface (DCM) HAL module driver |
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Enable STM32Cube Digital filter for sigma delta modulators (DFSDM) HAL module driver |
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Enable STM32Cube Extended Digital filter for sigma delta modulators (DFSDM) HAL module driver |
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Enable STM32Cube Direct Memory Access controller (DMA) HAL module driver |
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Enable STM32Cube Chrom-Art Accelerator™ controller (DMA2D) HAL module driver |
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Enable STM32Cube Extended Direct Memory Access controller (DMA) HAL module driver |
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Enable STM32Cube Display Serial Interface Host (DSI) HAL module driver |
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Enable STM32Cube Ethernet (ETH) HAL module driver |
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Enable STM32Cube Extended Ethernet (ETH) HAL module driver |
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Enable STM32Cube Extended interrupt and event controller (EXTI) HAL module driver |
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Enable STM32Cube Controller area network with flexible data rate (FDCAN) HAL module driver |
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Enable STM32Cube Firewall HAL module driver |
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Enable STM32Cube Embedded Flash Memory (FLASH) HAL module driver |
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Enable STM32Cube Extended Embedded Flash Memory (FLASH) HAL module driver |
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Enable STM32Cube Embedded Flash Memory RAM functions (FLASH_RAMFUNC) HAL module driver |
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Enable STM32Cube Fast-mode Plus Inter-integrated circuit (FMPI2C) HAL module driver |
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Enable STM32Cube Extended Fast-mode Plus Inter-integrated circuit (FMPI2C) HAL module driver |
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Enable STM32Cube Chrom-GRCTM (GFXMMU) HAL module driver |
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Enable STM32Cube General-purpose I/Os (GPIO) HAL module driver |
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Enable STM32Cube Extended General-purpose I/Os (GPIO) HAL module driver |
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Enable STM32Cube Hash processor (HASH) HAL module driver |
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Enable STM32Cube Extended Hash processor (HASH) HAL module driver |
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Enable STM32Cube Host Controller device (HCD) HAL module driver |
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Enable STM32Cube High-Resolution Timer (HRTIM) HAL module driver |
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Enable STM32Cube Hardware Semaphore (HSEM) HAL module driver |
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Enable STM32Cube Inter-integrated circuit (I2C) interface HAL module driver |
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Enable STM32Cube Extended Inter-integrated circuit (I2C) interface HAL module driver |
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Enable STM32Cube Inter-IC sound (I2S) HAL module driver |
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Enable STM32Cube Etxended Inter-IC sound (I2S) HAL module driver |
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Enable STM32Cube Inter-Processor communication controller (IPCC) HAL module driver |
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Enable STM32Cube Infrared Data Association (IRDA) HAL module driver |
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Enable STM32Cube Independent watchdog (IWDG) HAL module driver |
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Enable STM32Cube Jpeg codec (JPEG) HAL module driver |
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Enable STM32Cube LCD controller (LCD) HAL module driver |
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Enable STM32Cube Low Power Timer (LPTIM) HAL module driver |
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Enable STM32Cube LCD-TFT controller (LTDC) HAL module driver |
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Enable STM32Cube Extended LCD-TFT controller (LTDC) HAL module driver |
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Enable STM32Cube Management data input/output (MDIOS) HAL module driver |
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Enable STM32Cube Master Direct Memory Access controller (MDMA) HAL module driver |
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Enable STM32Cube MultiMediaCard interface (SDMMC) HAL module driver |
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Enable STM32Cube Extended MultiMediaCard interface (SDMMC) HAL module driver |
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Enable STM32Cube NAND Controller (NAND) HAL module driver |
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Enable STM32Cube NOR Controller (NOR) HAL module driver |
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Enable STM32Cube Operational amplifiers (OPAMP) HAL module driver |
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Enable STM32Cube Extended Operational amplifiers (OPAMP) HAL module driver |
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Enable STM32Cube Octo-SPI interface (OSPI) HAL module driver |
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Enable STM32Cube PCCard memories (PCCARD) HAL module driver |
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Enable STM32Cube USB Peripheral Controller (PCD) HAL module driver |
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Enable STM32Cube Extended USB Peripheral Controller (PCD) HAL module driver |
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Enable STM32Cube Parallel Synchronous Slave Interface (PSSI) HAL module driver |
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Enable STM32Cube Power control (PWR) HAL module driver |
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Enable STM32Cube Extended Power control (PWR) HAL module driver |
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Enable STM32Cube Quad-SPI interface (QSPI) HAL module driver |
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Enable STM32Cube RAM ECC monitoring (RAMECC) HAL module driver |
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Enable STM32Cube True random number generator (RNG) HAL module driver |
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Enable STM32Cube Real-time clock (RTC) HAL module driver |
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Enable STM32Cube Extended Real-time clock (RTC) HAL module driver |
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Enable STM32Cube Serial audio interface (SAI) HAL module driver |
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Enable STM32Cube Extended Serial audio interface (SAI) HAL module driver |
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Enable STM32Cube Secure digital input/output MultiMediaCard interface (SDMMC) HAL module driver |
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Enable STM32Cube SDADC HAL module driver |
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Enable STM32Cube SDRAM controller (SDRAM) HAL module driver |
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Enable STM32Cube Extended Secure digital input/output MultiMediaCard interface (SDMMC) HAL module driver |
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Enable STM32Cube Smartcard controller (SMARTCARD) HAL module driver |
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Enable STM32Cube Extended Smartcard controller (SMARTCARD) HAL module driver |
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Enable STM32Cube System Management Bus (SMBus) HAL module driver |
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Enable STM32Cube SPDIF receiver interface (SPDIFRX) HAL module driver |
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Enable STM32Cube Serial peripheral interface (SPI) HAL module driver |
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Enable STM32Cube Extended Serial peripheral interface (SPI) HAL module driver |
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Enable STM32Cube SRAM controller (SRAM) HAL module driver |
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Enable STM32Cube Single Wire Protocol Master Interface (SWPMI) HAL module |
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Enable STM32Cube Timer (TIM) HAL module driver |
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Enable STM32Cube Extended Timer (TIM) HAL module driver |
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Enable STM32Cube Touch sensing controller (TSC) HAL module driver |
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Enable STM32Cube Universal asynchronous receiver transmitter (USART) HAL module driver |
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Enable STM32Cube Extended Universal asynchronous receiver transmitter (USART) HAL module driver |
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Enable STM32Cube Universal synchronous asynchronous receiver transmitter (USART) HAL module driver |
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Enable STM32Cube Extended Universal synchronous asynchronous receiver transmitter (USART) HAL module driver |
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Enable STM32Cube System window watchdog (WWDG) HAL module driver |
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Enable STM32Cube Analog-to-Digital Converter (ADC) LL module driver |
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Enable STM32Cube Basic direct memory access controller (BDMA) LL module driver |
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Enable STM32Cube Ultra Low Power Comparator channels (COMP) LL module driver |
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Enable STM32Cube Cyclic redundancy check calculation unit (CRC) LL module driver |
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Enable STM32Cube Clock recovery system (CRS) LL module driver |
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Enable STM32Cube Digital-to-analog converter (DAC) LL module driver |
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Enable STM32Cube DelayBlock (DELAYBLOCK) LL module driver |
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Enable STM32Cube Direct Memory Access controller (DMA) LL module driver |
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Enable STM32Cube Chrom-Art Accelerator™ controller (DMA2D) LL module driver |
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Enable STM32Cube Extended interrupt and event controller (EXTI) LL module driver |
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Enable STM32Cube Flexible memory controller (FMC) LL module driver |
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Enable STM32Cube Flexible static memory controller (FSMC) LL module driver |
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Enable STM32Cube Extended General-purpose I/Os (GPIO) LL module driver |
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Enable STM32Cube High-Resolution Timer (HRTIM) LL module driver |
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Enable STM32Cube Inter-integrated circuit (I2C) interface LL module driver |
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Enable STM32Cube Inter-Processor communication controller (IPCC) LL module driver |
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Enable STM32Cube Low Power Timer (LPTIM) LL module driver |
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Enable STM32Cube Low-power universal asynchronous receiver transmitter (LPUART) LL module driver |
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Enable STM32Cube Master Direct Memory Access controller (MDMA) LL module driver |
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Enable STM32Cube Operational amplifiers (OPAMP) LL module driver |
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Enable STM32Cube Power control (PWR) LL module driver |
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Enable STM32Cube Reset and Clock Control (RCC) LL module driver |
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Enable STM32Cube True random number generator (RNG) LL module driver |
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Enable STM32Cube Real-time clock (RTC) LL module driver |
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Enable STM32Cube SD/SDIO/MMC card host interface (SDMMC) LL module driver |
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Enable STM32Cube Serial peripheral interface (SPI) LL module driver |
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Enable STM32Cube Single Wire Protocol Master Interface (SWPMI) LL module driver |
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Enable STM32Cube Timer (TIM) LL module driver |
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Enable STM32Cube Universal synchronous asynchronous receiver transmitter (USART) LL module driver |
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Enable STM32Cube Universal serial bus full-speed device interface (USB) LL module driver |
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Enable STM32Cube Utility functions (UTILS) LL module driver |
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RV32M1 VEGA SDK support |
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Build the Xtensa HAL module during build process. This is selected by the Xtensa ARCH kconfig automatically. |
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