CONFIG_RGF_NUM_BANKS¶
Number of General Purpose Register Banks
Type: int
Help¶
The ARC CPU can be configured to have more than one register
bank. If fast interrupts are supported (FIRQ), the 2nd
register bank, in the set, will be used by FIRQ interrupts.
If fast interrupts are supported but there is only 1
register bank, the fast interrupt handler must save
and restore general purpose registers.
NOTE: it's required to have more than one interrupt priority level
to use second register bank - otherwise all interrupts will use
same register bank. Such configuration isn't supported in software
and it is not beneficial from the performance point of view.
Direct dependencies¶
SOC_ARC_HSDK || SOC_ARC_IOT || (SOC_EMSDP_EM4 && SOC_ARC_EMSDP) || (SOC_EMSDP_EM5D && SOC_ARC_EMSDP) || (SOC_EMSDP_EM6 && SOC_ARC_EMSDP) || (SOC_EMSDP_EM7D && SOC_ARC_EMSDP) || (SOC_EMSDP_EM7D_ESP && SOC_ARC_EMSDP) || (SOC_EMSDP_EM9D && SOC_ARC_EMSDP) || (SOC_EMSDP_EM11D && SOC_ARC_EMSDP) || (SOC_EMSK_EM7D && SOC_EMSK) || (SOC_EMSK_EM11D && SOC_EMSK) || (SOC_EMSK_EM9D && SOC_EMSK) || (SOC_NSIM_EM && SOC_NSIM) || (SOC_NSIM_EM7D_V22 && SOC_NSIM) || (SOC_NSIM_SEM && SOC_NSIM) || (SOC_NSIM_HS && SOC_NSIM) || (SOC_NSIM_HS_SMP && SOC_NSIM) || (SOC_NSIM_HS_MPUV6 && SOC_NSIM) || SOC_QEMU_ARC || (ARC_FIRQ && NUM_IRQ_PRIO_LEVELS > 1 && ARC)
(Includes any dependencies from ifs and menus.)
Defaults¶
2
2
2
2
2
2
1
2
2
1
2
2
2
1
1
2
2
2
1
2
Kconfig definitions¶
At soc/arc/snps_arc_hsdk/Kconfig.defconfig:21
Included via Kconfig:8 → Kconfig.zephyr:27
Menu path: (Top)
config RGF_NUM_BANKS
int
default 2
depends on SOC_ARC_HSDK
At soc/arc/snps_arc_iot/Kconfig.defconfig:25
Included via Kconfig:8 → Kconfig.zephyr:27
Menu path: (Top)
config RGF_NUM_BANKS
int
default 2
depends on SOC_ARC_IOT
At soc/arc/snps_emsdp/Kconfig.defconfig.em4:15
Included via Kconfig:8 → Kconfig.zephyr:27 → soc/arc/snps_emsdp/Kconfig.defconfig:14
Menu path: (Top)
config RGF_NUM_BANKS
int
default 2
depends on SOC_EMSDP_EM4 && SOC_ARC_EMSDP
At soc/arc/snps_emsdp/Kconfig.defconfig.em5d:15
Included via Kconfig:8 → Kconfig.zephyr:27 → soc/arc/snps_emsdp/Kconfig.defconfig:15
Menu path: (Top)
config RGF_NUM_BANKS
int
default 2
depends on SOC_EMSDP_EM5D && SOC_ARC_EMSDP
At soc/arc/snps_emsdp/Kconfig.defconfig.em6:15
Included via Kconfig:8 → Kconfig.zephyr:27 → soc/arc/snps_emsdp/Kconfig.defconfig:16
Menu path: (Top)
config RGF_NUM_BANKS
int
default 2
depends on SOC_EMSDP_EM6 && SOC_ARC_EMSDP
At soc/arc/snps_emsdp/Kconfig.defconfig.em7d:15
Included via Kconfig:8 → Kconfig.zephyr:27 → soc/arc/snps_emsdp/Kconfig.defconfig:17
Menu path: (Top)
config RGF_NUM_BANKS
int
default 2
depends on SOC_EMSDP_EM7D && SOC_ARC_EMSDP
At soc/arc/snps_emsdp/Kconfig.defconfig.em7d_esp:15
Included via Kconfig:8 → Kconfig.zephyr:27 → soc/arc/snps_emsdp/Kconfig.defconfig:18
Menu path: (Top)
config RGF_NUM_BANKS
int
default 1
depends on SOC_EMSDP_EM7D_ESP && SOC_ARC_EMSDP
At soc/arc/snps_emsdp/Kconfig.defconfig.em9d:15
Included via Kconfig:8 → Kconfig.zephyr:27 → soc/arc/snps_emsdp/Kconfig.defconfig:19
Menu path: (Top)
config RGF_NUM_BANKS
int
default 2
depends on SOC_EMSDP_EM9D && SOC_ARC_EMSDP
At soc/arc/snps_emsdp/Kconfig.defconfig.em11d:15
Included via Kconfig:8 → Kconfig.zephyr:27 → soc/arc/snps_emsdp/Kconfig.defconfig:20
Menu path: (Top)
config RGF_NUM_BANKS
int
default 2
depends on SOC_EMSDP_EM11D && SOC_ARC_EMSDP
At soc/arc/snps_emsk/Kconfig.defconfig.em7d:24
Included via Kconfig:8 → Kconfig.zephyr:27 → soc/arc/snps_emsk/Kconfig.defconfig:10
Menu path: (Top)
config RGF_NUM_BANKS
int
default 1
depends on SOC_EMSK_EM7D && SOC_EMSK
At soc/arc/snps_emsk/Kconfig.defconfig.em11d:20
Included via Kconfig:8 → Kconfig.zephyr:27 → soc/arc/snps_emsk/Kconfig.defconfig:11
Menu path: (Top)
config RGF_NUM_BANKS
int
default 2
depends on SOC_EMSK_EM11D && SOC_EMSK
At soc/arc/snps_emsk/Kconfig.defconfig.em9d:20
Included via Kconfig:8 → Kconfig.zephyr:27 → soc/arc/snps_emsk/Kconfig.defconfig:12
Menu path: (Top)
config RGF_NUM_BANKS
int
default 2
depends on SOC_EMSK_EM9D && SOC_EMSK
At soc/arc/snps_nsim/Kconfig.defconfig.em:21
Included via Kconfig:8 → Kconfig.zephyr:27 → soc/arc/snps_nsim/Kconfig.defconfig:12
Menu path: (Top)
config RGF_NUM_BANKS
int
default 2
depends on SOC_NSIM_EM && SOC_NSIM
At soc/arc/snps_nsim/Kconfig.defconfig.em7d_v22:21
Included via Kconfig:8 → Kconfig.zephyr:27 → soc/arc/snps_nsim/Kconfig.defconfig:13
Menu path: (Top)
config RGF_NUM_BANKS
int
default 1
depends on SOC_NSIM_EM7D_V22 && SOC_NSIM
At soc/arc/snps_nsim/Kconfig.defconfig.sem:21
Included via Kconfig:8 → Kconfig.zephyr:27 → soc/arc/snps_nsim/Kconfig.defconfig:14
Menu path: (Top)
config RGF_NUM_BANKS
int
default 1
depends on SOC_NSIM_SEM && SOC_NSIM
At soc/arc/snps_nsim/Kconfig.defconfig.hs:18
Included via Kconfig:8 → Kconfig.zephyr:27 → soc/arc/snps_nsim/Kconfig.defconfig:15
Menu path: (Top)
config RGF_NUM_BANKS
int
default 2
depends on SOC_NSIM_HS && SOC_NSIM
At soc/arc/snps_nsim/Kconfig.defconfig.hs_smp:18
Included via Kconfig:8 → Kconfig.zephyr:27 → soc/arc/snps_nsim/Kconfig.defconfig:16
Menu path: (Top)
config RGF_NUM_BANKS
int
default 2
depends on SOC_NSIM_HS_SMP && SOC_NSIM
At soc/arc/snps_nsim/Kconfig.defconfig.hs_mpuv6:24
Included via Kconfig:8 → Kconfig.zephyr:27 → soc/arc/snps_nsim/Kconfig.defconfig:19
Menu path: (Top)
config RGF_NUM_BANKS
int
default 2
depends on SOC_NSIM_HS_MPUV6 && SOC_NSIM
At soc/arc/snps_qemu/Kconfig.defconfig:14
Included via Kconfig:8 → Kconfig.zephyr:27
Menu path: (Top)
config RGF_NUM_BANKS
int
default 1
depends on SOC_QEMU_ARC
At arch/arc/Kconfig:136
Included via Kconfig:8 → Kconfig.zephyr:39 → arch/Kconfig:12
Menu path: (Top) → ARC Options → ARC CPU Options
config RGF_NUM_BANKS
int "Number of General Purpose Register Banks"
range 1 2
default 2
depends on ARC_FIRQ && NUM_IRQ_PRIO_LEVELS > 1 && ARC
help
The ARC CPU can be configured to have more than one register
bank. If fast interrupts are supported (FIRQ), the 2nd
register bank, in the set, will be used by FIRQ interrupts.
If fast interrupts are supported but there is only 1
register bank, the fast interrupt handler must save
and restore general purpose registers.
NOTE: it's required to have more than one interrupt priority level
to use second register bank - otherwise all interrupts will use
same register bank. Such configuration isn't supported in software
and it is not beneficial from the performance point of view.
(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)