Zephyr API Documentation  3.7.0
A Scalable Open Source RTOS
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mipi_dbi.h File Reference

Public APIs for MIPI-DBI drivers. More...

Go to the source code of this file.

Data Structures

struct  mipi_dbi_config
 MIPI DBI controller configuration. More...
 
struct  mipi_dbi_driver_api
 MIPI-DBI host driver API. More...
 

Macros

#define MIPI_DBI_SPI_CONFIG_DT(node_id, operation_, delay_)
 initialize a MIPI DBI SPI configuration struct from devicetree
 
#define MIPI_DBI_SPI_CONFIG_DT_INST(inst, operation_, delay_)    MIPI_DBI_SPI_CONFIG_DT(DT_DRV_INST(inst), operation_, delay_)
 Initialize a MIPI DBI SPI configuration from devicetree instance.
 
#define MIPI_DBI_CONFIG_DT(node_id, operation_, delay_)
 Initialize a MIPI DBI configuration from devicetree.
 
#define MIPI_DBI_CONFIG_DT_INST(inst, operation_, delay_)    MIPI_DBI_CONFIG_DT(DT_DRV_INST(inst), operation_, delay_)
 Initialize a MIPI DBI configuration from device instance.
 

Functions

static int mipi_dbi_command_write (const struct device *dev, const struct mipi_dbi_config *config, uint8_t cmd, const uint8_t *data, size_t len)
 Write a command to the display controller.
 
static int mipi_dbi_command_read (const struct device *dev, const struct mipi_dbi_config *config, uint8_t *cmds, size_t num_cmd, uint8_t *response, size_t len)
 Read a command response from the display controller.
 
static int mipi_dbi_write_display (const struct device *dev, const struct mipi_dbi_config *config, const uint8_t *framebuf, struct display_buffer_descriptor *desc, enum display_pixel_format pixfmt)
 Write a display buffer to the display controller.
 
static int mipi_dbi_reset (const struct device *dev, uint32_t delay)
 Resets attached display controller.
 
static int mipi_dbi_release (const struct device *dev, const struct mipi_dbi_config *config)
 Releases a locked MIPI DBI device.
 

Detailed Description

Public APIs for MIPI-DBI drivers.

MIPI-DBI defines the following 3 interfaces: Type A: Motorola 6800 type parallel bus Type B: Intel 8080 type parallel bus Type C: SPI Type (1 bit bus) with 3 options:

  1. 9 write clocks per byte, final bit is command/data selection bit
  2. Same as above, but 16 write clocks per byte
  3. 8 write clocks per byte. Command/data selected via GPIO pin The current driver interface only supports type C modes 1 and 3