Zephyr API Documentation  3.7.0
A Scalable Open Source RTOS
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memory-attr-riscv.h File Reference

Go to the source code of this file.

Macros

#define DT_MEM_RISCV_MASK   DT_MEM_ARCH_ATTR_MASK
 
#define DT_MEM_RISCV_GET(x)   ((x) & DT_MEM_RISCV_MASK)
 
#define DT_MEM_RISCV(x)   ((x) << DT_MEM_ARCH_ATTR_SHIFT)
 
#define ATTR_RISCV_TYPE_MAIN   BIT(0)
 
#define ATTR_RISCV_TYPE_IO   BIT(1)
 
#define ATTR_RISCV_TYPE_EMPTY   BIT(2)
 
#define ATTR_RISCV_AMO_SWAP   BIT(3)
 
#define ATTR_RISCV_AMO_LOGICAL   BIT(4)
 
#define ATTR_RISCV_AMO_ARITHMETIC   BIT(5)
 
#define ATTR_RISCV_IO_IDEMPOTENT_READ   BIT(6)
 
#define ATTR_RISCV_IO_IDEMPOTENT_WRITE   BIT(7)
 
#define DT_MEM_RISCV_TYPE_MAIN   DT_MEM_RISCV(ATTR_RISCV_TYPE_MAIN)
 
#define DT_MEM_RISCV_TYPE_IO   DT_MEM_RISCV(ATTR_RISCV_TYPE_IO)
 
#define DT_MEM_RISCV_TYPE_EMPTY   DT_MEM_RISCV(ATTR_RISCV_TYPE_EMPTY)
 
#define DT_MEM_RISCV_AMO_SWAP   DT_MEM_RISCV(ATTR_RISCV_AMO_SWAP)
 
#define DT_MEM_RISCV_AMO_LOGICAL   DT_MEM_RISCV(ATTR_RISCV_AMO_LOGICAL)
 
#define DT_MEM_RISCV_AMO_ARITHMETIC   DT_MEM_RISCV(ATTR_RISCV_AMO_ARITHMETIC)
 
#define DT_MEM_RISCV_IO_IDEMPOTENT_READ   DT_MEM_RISCV(ATTR_RISCV_IO_IDEMPOTENT_READ)
 
#define DT_MEM_RISCV_IO_IDEMPOTENT_WRITE   DT_MEM_RISCV(ATTR_RISCV_IO_IDEMPOTENT_WRITE)
 
#define DT_MEM_RISCV_UNKNOWN   DT_MEM_ARCH_ATTR_UNKNOWN
 

Macro Definition Documentation

◆ ATTR_RISCV_AMO_ARITHMETIC

#define ATTR_RISCV_AMO_ARITHMETIC   BIT(5)

◆ ATTR_RISCV_AMO_LOGICAL

#define ATTR_RISCV_AMO_LOGICAL   BIT(4)

◆ ATTR_RISCV_AMO_SWAP

#define ATTR_RISCV_AMO_SWAP   BIT(3)

◆ ATTR_RISCV_IO_IDEMPOTENT_READ

#define ATTR_RISCV_IO_IDEMPOTENT_READ   BIT(6)

◆ ATTR_RISCV_IO_IDEMPOTENT_WRITE

#define ATTR_RISCV_IO_IDEMPOTENT_WRITE   BIT(7)

◆ ATTR_RISCV_TYPE_EMPTY

#define ATTR_RISCV_TYPE_EMPTY   BIT(2)

◆ ATTR_RISCV_TYPE_IO

#define ATTR_RISCV_TYPE_IO   BIT(1)

◆ ATTR_RISCV_TYPE_MAIN

#define ATTR_RISCV_TYPE_MAIN   BIT(0)

◆ DT_MEM_RISCV

#define DT_MEM_RISCV (   x)    ((x) << DT_MEM_ARCH_ATTR_SHIFT)

◆ DT_MEM_RISCV_AMO_ARITHMETIC

#define DT_MEM_RISCV_AMO_ARITHMETIC   DT_MEM_RISCV(ATTR_RISCV_AMO_ARITHMETIC)

◆ DT_MEM_RISCV_AMO_LOGICAL

#define DT_MEM_RISCV_AMO_LOGICAL   DT_MEM_RISCV(ATTR_RISCV_AMO_LOGICAL)

◆ DT_MEM_RISCV_AMO_SWAP

#define DT_MEM_RISCV_AMO_SWAP   DT_MEM_RISCV(ATTR_RISCV_AMO_SWAP)

◆ DT_MEM_RISCV_GET

#define DT_MEM_RISCV_GET (   x)    ((x) & DT_MEM_RISCV_MASK)

◆ DT_MEM_RISCV_IO_IDEMPOTENT_READ

#define DT_MEM_RISCV_IO_IDEMPOTENT_READ   DT_MEM_RISCV(ATTR_RISCV_IO_IDEMPOTENT_READ)

◆ DT_MEM_RISCV_IO_IDEMPOTENT_WRITE

#define DT_MEM_RISCV_IO_IDEMPOTENT_WRITE   DT_MEM_RISCV(ATTR_RISCV_IO_IDEMPOTENT_WRITE)

◆ DT_MEM_RISCV_MASK

#define DT_MEM_RISCV_MASK   DT_MEM_ARCH_ATTR_MASK

◆ DT_MEM_RISCV_TYPE_EMPTY

#define DT_MEM_RISCV_TYPE_EMPTY   DT_MEM_RISCV(ATTR_RISCV_TYPE_EMPTY)

◆ DT_MEM_RISCV_TYPE_IO

#define DT_MEM_RISCV_TYPE_IO   DT_MEM_RISCV(ATTR_RISCV_TYPE_IO)

◆ DT_MEM_RISCV_TYPE_MAIN

#define DT_MEM_RISCV_TYPE_MAIN   DT_MEM_RISCV(ATTR_RISCV_TYPE_MAIN)

◆ DT_MEM_RISCV_UNKNOWN

#define DT_MEM_RISCV_UNKNOWN   DT_MEM_ARCH_ATTR_UNKNOWN