Zephyr API Documentation
3.7.0
A Scalable Open Source RTOS
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#include <zephyr/sys/util.h>
Go to the source code of this file.
Macros | |
#define | RZT2M_GPIO_DRIVE_OFFSET 8 |
#define | RZT2M_GPIO_DRIVE_MASK GENMASK(RZT2M_GPIO_DRIVE_OFFSET + 2, RZT2M_GPIO_DRIVE_OFFSET) |
#define | RZT2M_GPIO_DRIVE_LOW (0U << RZT2M_GPIO_DRIVE_OFFSET) |
Select GPIO pin drive strength. | |
#define | RZT2M_GPIO_DRIVE_MIDDLE (1U << RZT2M_GPIO_DRIVE_OFFSET) |
#define | RZT2M_GPIO_DRIVE_HIGH (2U << RZT2M_GPIO_DRIVE_OFFSET) |
#define | RZT2M_GPIO_DRIVE_ULTRA_HIGH (3U << RZT2M_GPIO_DRIVE_OFFSET) |
#define | RZT2M_GPIO_SCHMITT_TRIGGER_OFFSET 10 |
#define | RZT2M_GPIO_SCHMITT_TRIGGER_MASK BIT(RZT2M_GPIO_SCHMITT_TRIGGER_OFFSET) |
#define | RZT2M_GPIO_SCHMITT_TRIGGER BIT(RZT2M_GPIO_SCHMITT_TRIGGER_OFFSET) |
Enable GPIO pin schmitt trigger. | |
#define | RZT2M_GPIO_SLEW_RATE_OFFSET 11 |
#define | RZT2M_GPIO_SLEW_RATE_MASK BIT(RZT2M_GPIO_SLEW_RATE_OFFSET) |
#define | RZT2M_GPIO_SLEW_RATE_SLOW 0U |
Select GPIO pin slew rate. | |
#define | RZT2M_GPIO_SLEW_RATE_FAST BIT(RZT2M_GPIO_SLEW_RATE_OFFSET) |
#define RZT2M_GPIO_DRIVE_HIGH (2U << RZT2M_GPIO_DRIVE_OFFSET) |
#define RZT2M_GPIO_DRIVE_LOW (0U << RZT2M_GPIO_DRIVE_OFFSET) |
Select GPIO pin drive strength.
#define RZT2M_GPIO_DRIVE_MASK GENMASK(RZT2M_GPIO_DRIVE_OFFSET + 2, RZT2M_GPIO_DRIVE_OFFSET) |
#define RZT2M_GPIO_DRIVE_MIDDLE (1U << RZT2M_GPIO_DRIVE_OFFSET) |
#define RZT2M_GPIO_DRIVE_OFFSET 8 |
#define RZT2M_GPIO_DRIVE_ULTRA_HIGH (3U << RZT2M_GPIO_DRIVE_OFFSET) |
#define RZT2M_GPIO_SCHMITT_TRIGGER BIT(RZT2M_GPIO_SCHMITT_TRIGGER_OFFSET) |
Enable GPIO pin schmitt trigger.
#define RZT2M_GPIO_SCHMITT_TRIGGER_MASK BIT(RZT2M_GPIO_SCHMITT_TRIGGER_OFFSET) |
#define RZT2M_GPIO_SCHMITT_TRIGGER_OFFSET 10 |
#define RZT2M_GPIO_SLEW_RATE_FAST BIT(RZT2M_GPIO_SLEW_RATE_OFFSET) |
#define RZT2M_GPIO_SLEW_RATE_MASK BIT(RZT2M_GPIO_SLEW_RATE_OFFSET) |
#define RZT2M_GPIO_SLEW_RATE_OFFSET 11 |
#define RZT2M_GPIO_SLEW_RATE_SLOW 0U |
Select GPIO pin slew rate.