Zephyr API Documentation  3.7.0
A Scalable Open Source RTOS
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stm32-fmc-nor-psram.h File Reference

Go to the source code of this file.

Macros

#define STM32_FMC_DATA_ADDRESS_MUX_DISABLE   0x00000000UL
 
#define STM32_FMC_DATA_ADDRESS_MUX_ENABLE   0x00000002UL
 
#define STM32_FMC_MEMORY_TYPE_SRAM   0x00000000UL
 
#define STM32_FMC_MEMORY_TYPE_PSRAM   0x00000004UL
 
#define STM32_FMC_MEMORY_TYPE_NOR   0x00000008UL
 
#define STM32_FMC_NORSRAM_MEM_BUS_WIDTH_8   0x00000000UL
 
#define STM32_FMC_NORSRAM_MEM_BUS_WIDTH_16   0x00000010UL
 
#define STM32_FMC_NORSRAM_MEM_BUS_WIDTH_32   0x00000020UL
 
#define STM32_FMC_BURST_ACCESS_MODE_DISABLE   0x00000000UL
 
#define STM32_FMC_BURST_ACCESS_MODE_ENABLE   0x00000100UL
 
#define STM32_FMC_WAIT_SIGNAL_POLARITY_LOW   0x00000000UL
 
#define STM32_FMC_WAIT_SIGNAL_POLARITY_HIGH   0x00000200UL
 
#define STM32_FMC_WAIT_TIMING_BEFORE_WS   0x00000000UL
 
#define STM32_FMC_WAIT_TIMING_DURING_WS   0x00000800UL
 
#define STM32_FMC_WRITE_OPERATION_DISABLE   0x00000000UL
 
#define STM32_FMC_WRITE_OPERATION_ENABLE   0x00001000UL
 
#define STM32_FMC_WAIT_SIGNAL_DISABLE   0x00000000UL
 
#define STM32_FMC_WAIT_SIGNAL_ENABLE   0x00002000UL
 
#define STM32_FMC_EXTENDED_MODE_DISABLE   0x00000000UL
 
#define STM32_FMC_EXTENDED_MODE_ENABLE   0x00004000UL
 
#define STM32_FMC_ASYNCHRONOUS_WAIT_DISABLE   0x00000000UL
 
#define STM32_FMC_ASYNCHRONOUS_WAIT_ENABLE   0x00008000UL
 
#define STM32_FMC_WRITE_BURST_DISABLE   0x00000000UL
 
#define STM32_FMC_WRITE_BURST_ENABLE   0x00080000UL
 
#define STM32_FMC_CONTINUOUS_CLOCK_SYNC_ONLY   0x00000000UL
 
#define STM32_FMC_CONTINUOUS_CLOCK_SYNC_ASYNC   0x00100000UL
 
#define STM32_FMC_WRITE_FIFO_DISABLE   0x00200000UL
 
#define STM32_FMC_WRITE_FIFO_ENABLE   0x00000000UL
 
#define STM32_FMC_PAGE_SIZE_NONE   0x00000000UL
 
#define STM32_FMC_PAGE_SIZE_128   0x00010000UL
 
#define STM32_FMC_PAGE_SIZE_256   0x00020000UL
 
#define STM32_FMC_PAGE_SIZE_512   0x00030000UL
 
#define STM32_FMC_PAGE_SIZE_1024   0x00040000UL
 
#define STM32_FMC_ACCESS_MODE_A   0x00000000UL
 
#define STM32_FMC_ACCESS_MODE_B   0x10000000UL
 
#define STM32_FMC_ACCESS_MODE_C   0x20000000UL
 
#define STM32_FMC_ACCESS_MODE_D   0x30000000UL
 

Macro Definition Documentation

◆ STM32_FMC_ACCESS_MODE_A

#define STM32_FMC_ACCESS_MODE_A   0x00000000UL

◆ STM32_FMC_ACCESS_MODE_B

#define STM32_FMC_ACCESS_MODE_B   0x10000000UL

◆ STM32_FMC_ACCESS_MODE_C

#define STM32_FMC_ACCESS_MODE_C   0x20000000UL

◆ STM32_FMC_ACCESS_MODE_D

#define STM32_FMC_ACCESS_MODE_D   0x30000000UL

◆ STM32_FMC_ASYNCHRONOUS_WAIT_DISABLE

#define STM32_FMC_ASYNCHRONOUS_WAIT_DISABLE   0x00000000UL

◆ STM32_FMC_ASYNCHRONOUS_WAIT_ENABLE

#define STM32_FMC_ASYNCHRONOUS_WAIT_ENABLE   0x00008000UL

◆ STM32_FMC_BURST_ACCESS_MODE_DISABLE

#define STM32_FMC_BURST_ACCESS_MODE_DISABLE   0x00000000UL

◆ STM32_FMC_BURST_ACCESS_MODE_ENABLE

#define STM32_FMC_BURST_ACCESS_MODE_ENABLE   0x00000100UL

◆ STM32_FMC_CONTINUOUS_CLOCK_SYNC_ASYNC

#define STM32_FMC_CONTINUOUS_CLOCK_SYNC_ASYNC   0x00100000UL

◆ STM32_FMC_CONTINUOUS_CLOCK_SYNC_ONLY

#define STM32_FMC_CONTINUOUS_CLOCK_SYNC_ONLY   0x00000000UL

◆ STM32_FMC_DATA_ADDRESS_MUX_DISABLE

#define STM32_FMC_DATA_ADDRESS_MUX_DISABLE   0x00000000UL

◆ STM32_FMC_DATA_ADDRESS_MUX_ENABLE

#define STM32_FMC_DATA_ADDRESS_MUX_ENABLE   0x00000002UL

◆ STM32_FMC_EXTENDED_MODE_DISABLE

#define STM32_FMC_EXTENDED_MODE_DISABLE   0x00000000UL

◆ STM32_FMC_EXTENDED_MODE_ENABLE

#define STM32_FMC_EXTENDED_MODE_ENABLE   0x00004000UL

◆ STM32_FMC_MEMORY_TYPE_NOR

#define STM32_FMC_MEMORY_TYPE_NOR   0x00000008UL

◆ STM32_FMC_MEMORY_TYPE_PSRAM

#define STM32_FMC_MEMORY_TYPE_PSRAM   0x00000004UL

◆ STM32_FMC_MEMORY_TYPE_SRAM

#define STM32_FMC_MEMORY_TYPE_SRAM   0x00000000UL

◆ STM32_FMC_NORSRAM_MEM_BUS_WIDTH_16

#define STM32_FMC_NORSRAM_MEM_BUS_WIDTH_16   0x00000010UL

◆ STM32_FMC_NORSRAM_MEM_BUS_WIDTH_32

#define STM32_FMC_NORSRAM_MEM_BUS_WIDTH_32   0x00000020UL

◆ STM32_FMC_NORSRAM_MEM_BUS_WIDTH_8

#define STM32_FMC_NORSRAM_MEM_BUS_WIDTH_8   0x00000000UL

◆ STM32_FMC_PAGE_SIZE_1024

#define STM32_FMC_PAGE_SIZE_1024   0x00040000UL

◆ STM32_FMC_PAGE_SIZE_128

#define STM32_FMC_PAGE_SIZE_128   0x00010000UL

◆ STM32_FMC_PAGE_SIZE_256

#define STM32_FMC_PAGE_SIZE_256   0x00020000UL

◆ STM32_FMC_PAGE_SIZE_512

#define STM32_FMC_PAGE_SIZE_512   0x00030000UL

◆ STM32_FMC_PAGE_SIZE_NONE

#define STM32_FMC_PAGE_SIZE_NONE   0x00000000UL

◆ STM32_FMC_WAIT_SIGNAL_DISABLE

#define STM32_FMC_WAIT_SIGNAL_DISABLE   0x00000000UL

◆ STM32_FMC_WAIT_SIGNAL_ENABLE

#define STM32_FMC_WAIT_SIGNAL_ENABLE   0x00002000UL

◆ STM32_FMC_WAIT_SIGNAL_POLARITY_HIGH

#define STM32_FMC_WAIT_SIGNAL_POLARITY_HIGH   0x00000200UL

◆ STM32_FMC_WAIT_SIGNAL_POLARITY_LOW

#define STM32_FMC_WAIT_SIGNAL_POLARITY_LOW   0x00000000UL

◆ STM32_FMC_WAIT_TIMING_BEFORE_WS

#define STM32_FMC_WAIT_TIMING_BEFORE_WS   0x00000000UL

◆ STM32_FMC_WAIT_TIMING_DURING_WS

#define STM32_FMC_WAIT_TIMING_DURING_WS   0x00000800UL

◆ STM32_FMC_WRITE_BURST_DISABLE

#define STM32_FMC_WRITE_BURST_DISABLE   0x00000000UL

◆ STM32_FMC_WRITE_BURST_ENABLE

#define STM32_FMC_WRITE_BURST_ENABLE   0x00080000UL

◆ STM32_FMC_WRITE_FIFO_DISABLE

#define STM32_FMC_WRITE_FIFO_DISABLE   0x00200000UL

◆ STM32_FMC_WRITE_FIFO_ENABLE

#define STM32_FMC_WRITE_FIFO_ENABLE   0x00000000UL

◆ STM32_FMC_WRITE_OPERATION_DISABLE

#define STM32_FMC_WRITE_OPERATION_DISABLE   0x00000000UL

◆ STM32_FMC_WRITE_OPERATION_ENABLE

#define STM32_FMC_WRITE_OPERATION_ENABLE   0x00001000UL