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custom DMA flags for channel configuration
#define	STM32_DMA_CH_CFG_MODE(val) ((val & 0x1) << 5)
	DMA cyclic mode config on bit 5.

#define	STM32_DMA_MODE_NORMAL STM32_DMA_CH_CFG_MODE(0)

#define	STM32_DMA_MODE_CYCLIC STM32_DMA_CH_CFG_MODE(1)

#define	STM32_DMA_CH_CFG_DIRECTION(val) ((val & 0x3) << 6)
	DMA transfer direction config on bits 6-7.

#define	STM32_DMA_MEMORY_TO_MEMORY STM32_DMA_CH_CFG_DIRECTION(0)

#define	STM32_DMA_MEMORY_TO_PERIPH STM32_DMA_CH_CFG_DIRECTION(1)

#define	STM32_DMA_PERIPH_TO_MEMORY STM32_DMA_CH_CFG_DIRECTION(2)

#define	STM32_DMA_PERIPH_TO_PERIPH STM32_DMA_CH_CFG_DIRECTION(3)

#define	STM32_DMA_CH_CFG_PERIPH_ADDR_INC(val) ((val & 0x1) << 9)
	DMA Peripheral increment Address config on bit 9.

#define	STM32_DMA_PERIPH_NO_INC STM32_DMA_CH_CFG_PERIPH_ADDR_INC(0)

#define	STM32_DMA_PERIPH_INC STM32_DMA_CH_CFG_PERIPH_ADDR_INC(1)

#define	STM32_DMA_CH_CFG_MEM_ADDR_INC(val) ((val & 0x1) << 10)
	DMA Memory increment Address config on bit 10.

#define	STM32_DMA_MEM_NO_INC STM32_DMA_CH_CFG_MEM_ADDR_INC(0)

#define	STM32_DMA_MEM_INC STM32_DMA_CH_CFG_MEM_ADDR_INC(1)

#define	STM32_DMA_CH_CFG_PERIPH_WIDTH(val) ((val & 0x3) << 11)
	DMA Peripheral data size config on bits 11, 12.

#define	STM32_DMA_PERIPH_8BITS STM32_DMA_CH_CFG_PERIPH_WIDTH(0)

#define	STM32_DMA_PERIPH_16BITS STM32_DMA_CH_CFG_PERIPH_WIDTH(1)

#define	STM32_DMA_PERIPH_32BITS STM32_DMA_CH_CFG_PERIPH_WIDTH(2)

#define	STM32_DMA_CH_CFG_MEM_WIDTH(val) ((val & 0x3) << 13)
	DMA Memory data size config on bits 13, 14.

#define	STM32_DMA_MEM_8BITS STM32_DMA_CH_CFG_MEM_WIDTH(0)

#define	STM32_DMA_MEM_16BITS STM32_DMA_CH_CFG_MEM_WIDTH(1)

#define	STM32_DMA_MEM_32BITS STM32_DMA_CH_CFG_MEM_WIDTH(2)

#define	STM32_DMA_CH_CFG_PERIPH_INC_FIXED(val) ((val & 0x1) << 15)
	DMA Peripheral increment offset config on bit 15.

#define	STM32_DMA_CH_CFG_PRIORITY(val) ((val & 0x3) << 16)
	DMA Priority config on bits 16, 17.

#define	STM32_DMA_PRIORITY_LOW STM32_DMA_CH_CFG_PRIORITY(0)

#define	STM32_DMA_PRIORITY_MEDIUM STM32_DMA_CH_CFG_PRIORITY(1)

#define	STM32_DMA_PRIORITY_HIGH STM32_DMA_CH_CFG_PRIORITY(2)

#define	STM32_DMA_PRIORITY_VERY_HIGH STM32_DMA_CH_CFG_PRIORITY(3)

#define	STM32_DMA_FIFO_1_4 0U
	DMA FIFO threshold feature.

#define	STM32_DMA_FIFO_HALF 1U

#define	STM32_DMA_FIFO_3_4 2U

#define	STM32_DMA_FIFO_FULL 3U

#define	STM32_DMA_PERIPH_TX (STM32_DMA_MEMORY_TO_PERIPH \| STM32_DMA_MEM_INC)

#define	STM32_DMA_PERIPH_RX (STM32_DMA_PERIPH_TO_MEMORY \| STM32_DMA_MEM_INC)

#define	STM32_DMA_16BITS (STM32_DMA_PERIPH_16BITS \| STM32_DMA_MEM_16BITS)

Macro Definition Documentation

◆ STM32_DMA_16BITS

#define STM32_DMA_16BITS (STM32_DMA_PERIPH_16BITS | STM32_DMA_MEM_16BITS)

◆ STM32_DMA_CH_CFG_DIRECTION

#define STM32_DMA_CH_CFG_DIRECTION ( val ) ((val & 0x3) << 6)

DMA transfer direction config on bits 6-7.

◆ STM32_DMA_CH_CFG_MEM_ADDR_INC

#define STM32_DMA_CH_CFG_MEM_ADDR_INC ( val ) ((val & 0x1) << 10)

DMA Memory increment Address config on bit 10.

◆ STM32_DMA_CH_CFG_MEM_WIDTH

#define STM32_DMA_CH_CFG_MEM_WIDTH ( val ) ((val & 0x3) << 13)

DMA Memory data size config on bits 13, 14.

◆ STM32_DMA_CH_CFG_MODE

#define STM32_DMA_CH_CFG_MODE ( val ) ((val & 0x1) << 5)

DMA cyclic mode config on bit 5.

◆ STM32_DMA_CH_CFG_PERIPH_ADDR_INC

#define STM32_DMA_CH_CFG_PERIPH_ADDR_INC ( val ) ((val & 0x1) << 9)

DMA Peripheral increment Address config on bit 9.

◆ STM32_DMA_CH_CFG_PERIPH_INC_FIXED

#define STM32_DMA_CH_CFG_PERIPH_INC_FIXED ( val ) ((val & 0x1) << 15)

DMA Peripheral increment offset config on bit 15.

◆ STM32_DMA_CH_CFG_PERIPH_WIDTH

#define STM32_DMA_CH_CFG_PERIPH_WIDTH ( val ) ((val & 0x3) << 11)

DMA Peripheral data size config on bits 11, 12.

◆ STM32_DMA_CH_CFG_PRIORITY

#define STM32_DMA_CH_CFG_PRIORITY ( val ) ((val & 0x3) << 16)

DMA Priority config on bits 16, 17.

◆ STM32_DMA_FIFO_1_4

#define STM32_DMA_FIFO_1_4 0U

DMA FIFO threshold feature.

◆ STM32_DMA_FIFO_3_4

#define STM32_DMA_FIFO_3_4 2U

◆ STM32_DMA_FIFO_FULL

#define STM32_DMA_FIFO_FULL 3U

◆ STM32_DMA_FIFO_HALF

#define STM32_DMA_FIFO_HALF 1U

◆ STM32_DMA_MEM_16BITS

#define STM32_DMA_MEM_16BITS STM32_DMA_CH_CFG_MEM_WIDTH(1)

◆ STM32_DMA_MEM_32BITS

#define STM32_DMA_MEM_32BITS STM32_DMA_CH_CFG_MEM_WIDTH(2)

◆ STM32_DMA_MEM_8BITS

#define STM32_DMA_MEM_8BITS STM32_DMA_CH_CFG_MEM_WIDTH(0)

◆ STM32_DMA_MEM_INC

#define STM32_DMA_MEM_INC STM32_DMA_CH_CFG_MEM_ADDR_INC(1)

◆ STM32_DMA_MEM_NO_INC

#define STM32_DMA_MEM_NO_INC STM32_DMA_CH_CFG_MEM_ADDR_INC(0)

◆ STM32_DMA_MEMORY_TO_MEMORY

#define STM32_DMA_MEMORY_TO_MEMORY STM32_DMA_CH_CFG_DIRECTION(0)

◆ STM32_DMA_MEMORY_TO_PERIPH

#define STM32_DMA_MEMORY_TO_PERIPH STM32_DMA_CH_CFG_DIRECTION(1)

◆ STM32_DMA_MODE_CYCLIC

#define STM32_DMA_MODE_CYCLIC STM32_DMA_CH_CFG_MODE(1)

◆ STM32_DMA_MODE_NORMAL

#define STM32_DMA_MODE_NORMAL STM32_DMA_CH_CFG_MODE(0)

◆ STM32_DMA_PERIPH_16BITS

#define STM32_DMA_PERIPH_16BITS STM32_DMA_CH_CFG_PERIPH_WIDTH(1)

◆ STM32_DMA_PERIPH_32BITS

#define STM32_DMA_PERIPH_32BITS STM32_DMA_CH_CFG_PERIPH_WIDTH(2)

◆ STM32_DMA_PERIPH_8BITS

#define STM32_DMA_PERIPH_8BITS STM32_DMA_CH_CFG_PERIPH_WIDTH(0)

◆ STM32_DMA_PERIPH_INC

#define STM32_DMA_PERIPH_INC STM32_DMA_CH_CFG_PERIPH_ADDR_INC(1)

◆ STM32_DMA_PERIPH_NO_INC

#define STM32_DMA_PERIPH_NO_INC STM32_DMA_CH_CFG_PERIPH_ADDR_INC(0)

◆ STM32_DMA_PERIPH_RX

#define STM32_DMA_PERIPH_RX (STM32_DMA_PERIPH_TO_MEMORY | STM32_DMA_MEM_INC)

◆ STM32_DMA_PERIPH_TO_MEMORY

#define STM32_DMA_PERIPH_TO_MEMORY STM32_DMA_CH_CFG_DIRECTION(2)

◆ STM32_DMA_PERIPH_TO_PERIPH

#define STM32_DMA_PERIPH_TO_PERIPH STM32_DMA_CH_CFG_DIRECTION(3)

◆ STM32_DMA_PERIPH_TX

#define STM32_DMA_PERIPH_TX (STM32_DMA_MEMORY_TO_PERIPH | STM32_DMA_MEM_INC)

◆ STM32_DMA_PRIORITY_HIGH

#define STM32_DMA_PRIORITY_HIGH STM32_DMA_CH_CFG_PRIORITY(2)

◆ STM32_DMA_PRIORITY_LOW

#define STM32_DMA_PRIORITY_LOW STM32_DMA_CH_CFG_PRIORITY(0)

◆ STM32_DMA_PRIORITY_MEDIUM

#define STM32_DMA_PRIORITY_MEDIUM STM32_DMA_CH_CFG_PRIORITY(1)

◆ STM32_DMA_PRIORITY_VERY_HIGH

#define STM32_DMA_PRIORITY_VERY_HIGH STM32_DMA_CH_CFG_PRIORITY(3)

Macros