Zephyr API Documentation  3.7.0
A Scalable Open Source RTOS
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stm32f1-pinctrl.h
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1/*
2 * Copyright (c) 2017 Linaro Limited
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#ifndef ZEPHYR_STM32_PINCTRLF1_H_
8#define ZEPHYR_STM32_PINCTRLF1_H_
9
10#include <zephyr/dt-bindings/pinctrl/stm32-pinctrl-common.h>
11#include <zephyr/dt-bindings/pinctrl/stm32f1-afio.h>
12
13/* Adapted from Linux: include/dt-bindings/pinctrl/stm32-pinfunc.h */
14
20#define STM32_MODE_SHIFT 0U
21#define STM32_MODE_MASK 0x3U
22#define STM32_LINE_SHIFT 2U
23#define STM32_LINE_MASK 0xFU
24#define STM32_PORT_SHIFT 6U
25#define STM32_PORT_MASK 0xFU
26#define STM32_REMAP_SHIFT 10U
27#define STM32_REMAP_MASK 0x3FFU
28
44#define STM32F1_PINMUX(port, line, mode, remap) \
45 (((((port) - 'A') & STM32_PORT_MASK) << STM32_PORT_SHIFT) | \
46 (((line) & STM32_LINE_MASK) << STM32_LINE_SHIFT) | \
47 (((mode) & STM32_MODE_MASK) << STM32_MODE_SHIFT) | \
48 (((remap) & STM32_REMAP_MASK) << STM32_REMAP_SHIFT))
49
54#define ALTERNATE 0x0 /* Alternate function output */
55#define GPIO_IN 0x1 /* Input */
56#define ANALOG 0x2 /* Analog */
57#define GPIO_OUT 0x3 /* Output */
58
75/* Port Mode */
76#define STM32_MODE_INPUT (0x0 << STM32_MODE_INOUT_SHIFT)
77#define STM32_MODE_OUTPUT (0x1 << STM32_MODE_INOUT_SHIFT)
78#define STM32_MODE_INOUT_MASK 0x1
79#define STM32_MODE_INOUT_SHIFT 0
80
81/* Input Port configuration */
82#define STM32_CNF_IN_ANALOG (0x0 << STM32_CNF_IN_SHIFT)
83#define STM32_CNF_IN_FLOAT (0x1 << STM32_CNF_IN_SHIFT)
84#define STM32_CNF_IN_PUPD (0x2 << STM32_CNF_IN_SHIFT)
85#define STM32_CNF_IN_MASK 0x3
86#define STM32_CNF_IN_SHIFT 1
87
88/* Output Port configuration */
89#define STM32_MODE_OUTPUT_MAX_10 (0x0 << STM32_MODE_OSPEED_SHIFT)
90#define STM32_MODE_OUTPUT_MAX_2 (0x1 << STM32_MODE_OSPEED_SHIFT)
91#define STM32_MODE_OUTPUT_MAX_50 (0x2 << STM32_MODE_OSPEED_SHIFT)
92#define STM32_MODE_OSPEED_MASK 0x3
93#define STM32_MODE_OSPEED_SHIFT 3
94
95#define STM32_CNF_PUSH_PULL (0x0 << STM32_CNF_OUT_0_SHIFT)
96#define STM32_CNF_OPEN_DRAIN (0x1 << STM32_CNF_OUT_0_SHIFT)
97#define STM32_CNF_OUT_0_MASK 0x1
98#define STM32_CNF_OUT_0_SHIFT 5
99
100#define STM32_CNF_GP_OUTPUT (0x0 << STM32_CNF_OUT_1_SHIFT)
101#define STM32_CNF_ALT_FUNC (0x1 << STM32_CNF_OUT_1_SHIFT)
102#define STM32_CNF_OUT_1_MASK 0x1
103#define STM32_CNF_OUT_1_SHIFT 6
104
105/* GPIO High impedance/Pull-up/Pull-down */
106#define STM32_PUPD_NO_PULL (0x0 << STM32_PUPD_SHIFT)
107#define STM32_PUPD_PULL_UP (0x1 << STM32_PUPD_SHIFT)
108#define STM32_PUPD_PULL_DOWN (0x2 << STM32_PUPD_SHIFT)
109#define STM32_PUPD_MASK 0x3
110#define STM32_PUPD_SHIFT 7
111
112/* GPIO plain output value */
113#define STM32_ODR_0 (0x0 << STM32_ODR_SHIFT)
114#define STM32_ODR_1 (0x1 << STM32_ODR_SHIFT)
115#define STM32_ODR_MASK 0x1
116#define STM32_ODR_SHIFT 9
117
118#endif /* ZEPHYR_STM32_PINCTRLF1_H_ */