xlnx_gem.h File Reference

Go to the source code of this file.

Macros
#define	XLNX_GEM_PHY_AUTO_DETECT   0
#define	XLNX_GEM_MDC_DIVIDER_8   0 /* cpu_1x or IOU_SWITCH_CLK < 20 MHz */
#define	XLNX_GEM_MDC_DIVIDER_16   1 /* cpu_1x or IOU_SWITCH_CLK 20 - 40 MHz */
#define	XLNX_GEM_MDC_DIVIDER_32   2 /* cpu_1x or IOU_SWITCH_CLK 40 - 80 MHz */
#define	XLNX_GEM_MDC_DIVIDER_48   3 /* cpu_1x or IOU_SWITCH_CLK 80 - 120 MHz */
#define	XLNX_GEM_MDC_DIVIDER_64   4 /* cpu_1x or IOU_SWITCH_CLK 120 - 160 MHz */
#define	XLNX_GEM_MDC_DIVIDER_96   5 /* cpu_1x or IOU_SWITCH_CLK 160 - 240 MHz */
#define	XLNX_GEM_MDC_DIVIDER_128   6 /* cpu_1x or IOU_SWITCH_CLK 240 - 320 MHz */
#define	XLNX_GEM_MDC_DIVIDER_224   7 /* cpu_1x or IOU_SWITCH_CLK 320 - 540 MHz */
#define	XLNX_GEM_LINK_SPEED_10MBIT   1
#define	XLNX_GEM_LINK_SPEED_100MBIT   2
#define	XLNX_GEM_LINK_SPEED_1GBIT   3
#define	XLNX_GEM_AMBA_AHB_DBUS_WIDTH_32BIT   0
#define	XLNX_GEM_AMBA_AHB_DBUS_WIDTH_64BIT   1
#define	XLNX_GEM_AMBA_AHB_DBUS_WIDTH_128BIT   2
#define	XLNX_GEM_AMBA_AHB_BURST_SINGLE   1
#define	XLNX_GEM_AMBA_AHB_BURST_INCR4   4
#define	XLNX_GEM_AMBA_AHB_BURST_INCR8   8
#define	XLNX_GEM_AMBA_AHB_BURST_INCR16   16
#define	XLNX_GEM_HW_RX_BUFFER_SIZE_1KB   0
#define	XLNX_GEM_HW_RX_BUFFER_SIZE_2KB   1
#define	XLNX_GEM_HW_RX_BUFFER_SIZE_4KB   2
#define	XLNX_GEM_HW_RX_BUFFER_SIZE_8KB   3

Macro Definition Documentation

XLNX_GEM_AMBA_AHB_BURST_INCR16

#define XLNX_GEM_AMBA_AHB_BURST_INCR16   16

XLNX_GEM_AMBA_AHB_BURST_INCR4

#define XLNX_GEM_AMBA_AHB_BURST_INCR4   4

XLNX_GEM_AMBA_AHB_BURST_INCR8

#define XLNX_GEM_AMBA_AHB_BURST_INCR8   8

XLNX_GEM_AMBA_AHB_BURST_SINGLE

#define XLNX_GEM_AMBA_AHB_BURST_SINGLE   1

XLNX_GEM_AMBA_AHB_DBUS_WIDTH_128BIT

#define XLNX_GEM_AMBA_AHB_DBUS_WIDTH_128BIT   2

XLNX_GEM_AMBA_AHB_DBUS_WIDTH_32BIT

#define XLNX_GEM_AMBA_AHB_DBUS_WIDTH_32BIT   0

XLNX_GEM_AMBA_AHB_DBUS_WIDTH_64BIT

#define XLNX_GEM_AMBA_AHB_DBUS_WIDTH_64BIT   1

XLNX_GEM_HW_RX_BUFFER_SIZE_1KB

#define XLNX_GEM_HW_RX_BUFFER_SIZE_1KB   0

XLNX_GEM_HW_RX_BUFFER_SIZE_2KB

#define XLNX_GEM_HW_RX_BUFFER_SIZE_2KB   1

XLNX_GEM_HW_RX_BUFFER_SIZE_4KB

#define XLNX_GEM_HW_RX_BUFFER_SIZE_4KB   2

XLNX_GEM_HW_RX_BUFFER_SIZE_8KB

#define XLNX_GEM_HW_RX_BUFFER_SIZE_8KB   3

XLNX_GEM_LINK_SPEED_100MBIT

#define XLNX_GEM_LINK_SPEED_100MBIT   2

XLNX_GEM_LINK_SPEED_10MBIT

#define XLNX_GEM_LINK_SPEED_10MBIT   1

XLNX_GEM_LINK_SPEED_1GBIT

#define XLNX_GEM_LINK_SPEED_1GBIT   3

XLNX_GEM_MDC_DIVIDER_128

#define XLNX_GEM_MDC_DIVIDER_128   6 /* cpu_1x or IOU_SWITCH_CLK 240 - 320 MHz */

XLNX_GEM_MDC_DIVIDER_16

#define XLNX_GEM_MDC_DIVIDER_16   1 /* cpu_1x or IOU_SWITCH_CLK 20 - 40 MHz */

XLNX_GEM_MDC_DIVIDER_224

#define XLNX_GEM_MDC_DIVIDER_224   7 /* cpu_1x or IOU_SWITCH_CLK 320 - 540 MHz */

XLNX_GEM_MDC_DIVIDER_32

#define XLNX_GEM_MDC_DIVIDER_32   2 /* cpu_1x or IOU_SWITCH_CLK 40 - 80 MHz */

XLNX_GEM_MDC_DIVIDER_48

#define XLNX_GEM_MDC_DIVIDER_48   3 /* cpu_1x or IOU_SWITCH_CLK 80 - 120 MHz */

XLNX_GEM_MDC_DIVIDER_64

#define XLNX_GEM_MDC_DIVIDER_64   4 /* cpu_1x or IOU_SWITCH_CLK 120 - 160 MHz */

XLNX_GEM_MDC_DIVIDER_8

#define XLNX_GEM_MDC_DIVIDER_8   0 /* cpu_1x or IOU_SWITCH_CLK < 20 MHz */

XLNX_GEM_MDC_DIVIDER_96

#define XLNX_GEM_MDC_DIVIDER_96   5 /* cpu_1x or IOU_SWITCH_CLK 160 - 240 MHz */

XLNX_GEM_PHY_AUTO_DETECT

#define XLNX_GEM_PHY_AUTO_DETECT   0