Zephyr API Documentation 4.0.0
A Scalable Open Source RTOS
|
ARM AArch32 public interrupt handling. More...
Go to the source code of this file.
Macros | |
#define | IRQ_ZERO_LATENCY BIT(0) |
Set this interrupt up as a zero-latency IRQ. | |
#define | ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) |
#define | ARCH_IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p) |
#define | ARCH_ISR_DIRECT_PM() |
#define | ARCH_ISR_DIRECT_HEADER() |
#define | ARCH_ISR_DIRECT_FOOTER(swap) |
#define | ARCH_ISR_DIAG_OFF |
#define | ARCH_ISR_DIAG_ON |
#define | ARCH_ISR_DIRECT_DECLARE(name) |
Functions | |
void | arch_irq_enable (unsigned int irq) |
void | arch_irq_disable (unsigned int irq) |
int | arch_irq_is_enabled (unsigned int irq) |
static void | arch_isr_direct_header (void) |
static void | arch_isr_direct_footer (int maybe_swap) |
ARM AArch32 public interrupt handling.
ARM AArch32-specific kernel interrupt handling interface. Included by arm/arch.h.
#define ARCH_IRQ_CONNECT | ( | irq_p, | |
priority_p, | |||
isr_p, | |||
isr_param_p, | |||
flags_p ) |
#define ARCH_IRQ_DIRECT_CONNECT | ( | irq_p, | |
priority_p, | |||
isr_p, | |||
flags_p ) |
#define ARCH_ISR_DIAG_OFF |
#define ARCH_ISR_DIAG_ON |
#define ARCH_ISR_DIRECT_DECLARE | ( | name | ) |
#define ARCH_ISR_DIRECT_FOOTER | ( | swap | ) |
#define ARCH_ISR_DIRECT_HEADER | ( | ) |
#define ARCH_ISR_DIRECT_PM | ( | ) |
#define IRQ_ZERO_LATENCY BIT(0) |
Set this interrupt up as a zero-latency IRQ.
If CONFIG_ZERO_LATENCY_LEVELS is 1 it has a fixed hardware priority level (discarding what was supplied in the interrupt's priority argument). If CONFIG_ZERO_LATENCY_LEVELS is greater 1 it has the priority level assigned by the argument. The interrupt will run even if irq_lock() is active. Be careful!
|
extern |
|
extern |
|
extern |
|
inlinestatic |
|
inlinestatic |