Macros
#define	IMX_SC_R_A53 0U

#define	IMX_SC_R_A53_0 1U

#define	IMX_SC_R_A53_1 2U

#define	IMX_SC_R_A53_2 3U

#define	IMX_SC_R_A53_3 4U

#define	IMX_SC_R_A72 5U

#define	IMX_SC_R_A72_0 6U

#define	IMX_SC_R_A72_1 7U

#define	IMX_SC_R_A72_2 8U

#define	IMX_SC_R_A72_3 9U

#define	IMX_SC_R_CCI 10U

#define	IMX_SC_R_DB 11U

#define	IMX_SC_R_DRC_0 12U

#define	IMX_SC_R_DRC_1 13U

#define	IMX_SC_R_GIC_SMMU 14U

#define	IMX_SC_R_IRQSTR_M4_0 15U

#define	IMX_SC_R_IRQSTR_M4_1 16U

#define	IMX_SC_R_SMMU 17U

#define	IMX_SC_R_GIC 18U

#define	IMX_SC_R_DC_0_BLIT0 19U

#define	IMX_SC_R_DC_0_BLIT1 20U

#define	IMX_SC_R_DC_0_BLIT2 21U

#define	IMX_SC_R_DC_0_BLIT_OUT 22U

#define	IMX_SC_R_PERF 23U

#define	IMX_SC_R_USB_1_PHY 24U

#define	IMX_SC_R_DC_0_WARP 25U

#define	IMX_SC_R_V2X_MU_0 26U

#define	IMX_SC_R_V2X_MU_1 27U

#define	IMX_SC_R_DC_0_VIDEO0 28U

#define	IMX_SC_R_DC_0_VIDEO1 29U

#define	IMX_SC_R_DC_0_FRAC0 30U

#define	IMX_SC_R_V2X_MU_2 31U

#define	IMX_SC_R_DC_0 32U

#define	IMX_SC_R_GPU_2_PID0 33U

#define	IMX_SC_R_DC_0_PLL_0 34U

#define	IMX_SC_R_DC_0_PLL_1 35U

#define	IMX_SC_R_DC_1_BLIT0 36U

#define	IMX_SC_R_DC_1_BLIT1 37U

#define	IMX_SC_R_DC_1_BLIT2 38U

#define	IMX_SC_R_DC_1_BLIT_OUT 39U

#define	IMX_SC_R_V2X_MU_3 40U

#define	IMX_SC_R_V2X_MU_4 41U

#define	IMX_SC_R_DC_1_WARP 42U

#define	IMX_SC_R_UNUSED1 43U

#define	IMX_SC_R_SECVIO 44U

#define	IMX_SC_R_DC_1_VIDEO0 45U

#define	IMX_SC_R_DC_1_VIDEO1 46U

#define	IMX_SC_R_DC_1_FRAC0 47U

#define	IMX_SC_R_UNUSED13 48U

#define	IMX_SC_R_DC_1 49U

#define	IMX_SC_R_UNUSED14 50U

#define	IMX_SC_R_DC_1_PLL_0 51U

#define	IMX_SC_R_DC_1_PLL_1 52U

#define	IMX_SC_R_SPI_0 53U

#define	IMX_SC_R_SPI_1 54U

#define	IMX_SC_R_SPI_2 55U

#define	IMX_SC_R_SPI_3 56U

#define	IMX_SC_R_UART_0 57U

#define	IMX_SC_R_UART_1 58U

#define	IMX_SC_R_UART_2 59U

#define	IMX_SC_R_UART_3 60U

#define	IMX_SC_R_UART_4 61U

#define	IMX_SC_R_EMVSIM_0 62U

#define	IMX_SC_R_EMVSIM_1 63U

#define	IMX_SC_R_DMA_0_CH0 64U

#define	IMX_SC_R_DMA_0_CH1 65U

#define	IMX_SC_R_DMA_0_CH2 66U

#define	IMX_SC_R_DMA_0_CH3 67U

#define	IMX_SC_R_DMA_0_CH4 68U

#define	IMX_SC_R_DMA_0_CH5 69U

#define	IMX_SC_R_DMA_0_CH6 70U

#define	IMX_SC_R_DMA_0_CH7 71U

#define	IMX_SC_R_DMA_0_CH8 72U

#define	IMX_SC_R_DMA_0_CH9 73U

#define	IMX_SC_R_DMA_0_CH10 74U

#define	IMX_SC_R_DMA_0_CH11 75U

#define	IMX_SC_R_DMA_0_CH12 76U

#define	IMX_SC_R_DMA_0_CH13 77U

#define	IMX_SC_R_DMA_0_CH14 78U

#define	IMX_SC_R_DMA_0_CH15 79U

#define	IMX_SC_R_DMA_0_CH16 80U

#define	IMX_SC_R_DMA_0_CH17 81U

#define	IMX_SC_R_DMA_0_CH18 82U

#define	IMX_SC_R_DMA_0_CH19 83U

#define	IMX_SC_R_DMA_0_CH20 84U

#define	IMX_SC_R_DMA_0_CH21 85U

#define	IMX_SC_R_DMA_0_CH22 86U

#define	IMX_SC_R_DMA_0_CH23 87U

#define	IMX_SC_R_DMA_0_CH24 88U

#define	IMX_SC_R_DMA_0_CH25 89U

#define	IMX_SC_R_DMA_0_CH26 90U

#define	IMX_SC_R_DMA_0_CH27 91U

#define	IMX_SC_R_DMA_0_CH28 92U

#define	IMX_SC_R_DMA_0_CH29 93U

#define	IMX_SC_R_DMA_0_CH30 94U

#define	IMX_SC_R_DMA_0_CH31 95U

#define	IMX_SC_R_I2C_0 96U

#define	IMX_SC_R_I2C_1 97U

#define	IMX_SC_R_I2C_2 98U

#define	IMX_SC_R_I2C_3 99U

#define	IMX_SC_R_I2C_4 100U

#define	IMX_SC_R_ADC_0 101U

#define	IMX_SC_R_ADC_1 102U

#define	IMX_SC_R_FTM_0 103U

#define	IMX_SC_R_FTM_1 104U

#define	IMX_SC_R_CAN_0 105U

#define	IMX_SC_R_CAN_1 106U

#define	IMX_SC_R_CAN_2 107U

#define	IMX_SC_R_DMA_1_CH0 108U

#define	IMX_SC_R_DMA_1_CH1 109U

#define	IMX_SC_R_DMA_1_CH2 110U

#define	IMX_SC_R_DMA_1_CH3 111U

#define	IMX_SC_R_DMA_1_CH4 112U

#define	IMX_SC_R_DMA_1_CH5 113U

#define	IMX_SC_R_DMA_1_CH6 114U

#define	IMX_SC_R_DMA_1_CH7 115U

#define	IMX_SC_R_DMA_1_CH8 116U

#define	IMX_SC_R_DMA_1_CH9 117U

#define	IMX_SC_R_DMA_1_CH10 118U

#define	IMX_SC_R_DMA_1_CH11 119U

#define	IMX_SC_R_DMA_1_CH12 120U

#define	IMX_SC_R_DMA_1_CH13 121U

#define	IMX_SC_R_DMA_1_CH14 122U

#define	IMX_SC_R_DMA_1_CH15 123U

#define	IMX_SC_R_DMA_1_CH16 124U

#define	IMX_SC_R_DMA_1_CH17 125U

#define	IMX_SC_R_DMA_1_CH18 126U

#define	IMX_SC_R_DMA_1_CH19 127U

#define	IMX_SC_R_DMA_1_CH20 128U

#define	IMX_SC_R_DMA_1_CH21 129U

#define	IMX_SC_R_DMA_1_CH22 130U

#define	IMX_SC_R_DMA_1_CH23 131U

#define	IMX_SC_R_DMA_1_CH24 132U

#define	IMX_SC_R_DMA_1_CH25 133U

#define	IMX_SC_R_DMA_1_CH26 134U

#define	IMX_SC_R_DMA_1_CH27 135U

#define	IMX_SC_R_DMA_1_CH28 136U

#define	IMX_SC_R_DMA_1_CH29 137U

#define	IMX_SC_R_DMA_1_CH30 138U

#define	IMX_SC_R_DMA_1_CH31 139U

#define	IMX_SC_R_V2X_PID0 140U

#define	IMX_SC_R_V2X_PID1 141U

#define	IMX_SC_R_V2X_PID2 142U

#define	IMX_SC_R_V2X_PID3 143U

#define	IMX_SC_R_GPU_0_PID0 144U

#define	IMX_SC_R_GPU_0_PID1 145U

#define	IMX_SC_R_GPU_0_PID2 146U

#define	IMX_SC_R_GPU_0_PID3 147U

#define	IMX_SC_R_GPU_1_PID0 148U

#define	IMX_SC_R_GPU_1_PID1 149U

#define	IMX_SC_R_GPU_1_PID2 150U

#define	IMX_SC_R_GPU_1_PID3 151U

#define	IMX_SC_R_PCIE_A 152U

#define	IMX_SC_R_SERDES_0 153U

#define	IMX_SC_R_MATCH_0 154U

#define	IMX_SC_R_MATCH_1 155U

#define	IMX_SC_R_MATCH_2 156U

#define	IMX_SC_R_MATCH_3 157U

#define	IMX_SC_R_MATCH_4 158U

#define	IMX_SC_R_MATCH_5 159U

#define	IMX_SC_R_MATCH_6 160U

#define	IMX_SC_R_MATCH_7 161U

#define	IMX_SC_R_MATCH_8 162U

#define	IMX_SC_R_MATCH_9 163U

#define	IMX_SC_R_MATCH_10 164U

#define	IMX_SC_R_MATCH_11 165U

#define	IMX_SC_R_MATCH_12 166U

#define	IMX_SC_R_MATCH_13 167U

#define	IMX_SC_R_MATCH_14 168U

#define	IMX_SC_R_PCIE_B 169U

#define	IMX_SC_R_SATA_0 170U

#define	IMX_SC_R_SERDES_1 171U

#define	IMX_SC_R_HSIO_GPIO 172U

#define	IMX_SC_R_MATCH_15 173U

#define	IMX_SC_R_MATCH_16 174U

#define	IMX_SC_R_MATCH_17 175U

#define	IMX_SC_R_MATCH_18 176U

#define	IMX_SC_R_MATCH_19 177U

#define	IMX_SC_R_MATCH_20 178U

#define	IMX_SC_R_MATCH_21 179U

#define	IMX_SC_R_MATCH_22 180U

#define	IMX_SC_R_MATCH_23 181U

#define	IMX_SC_R_MATCH_24 182U

#define	IMX_SC_R_MATCH_25 183U

#define	IMX_SC_R_MATCH_26 184U

#define	IMX_SC_R_MATCH_27 185U

#define	IMX_SC_R_MATCH_28 186U

#define	IMX_SC_R_LCD_0 187U

#define	IMX_SC_R_LCD_0_PWM_0 188U

#define	IMX_SC_R_LCD_0_I2C_0 189U

#define	IMX_SC_R_LCD_0_I2C_1 190U

#define	IMX_SC_R_PWM_0 191U

#define	IMX_SC_R_PWM_1 192U

#define	IMX_SC_R_PWM_2 193U

#define	IMX_SC_R_PWM_3 194U

#define	IMX_SC_R_PWM_4 195U

#define	IMX_SC_R_PWM_5 196U

#define	IMX_SC_R_PWM_6 197U

#define	IMX_SC_R_PWM_7 198U

#define	IMX_SC_R_GPIO_0 199U

#define	IMX_SC_R_GPIO_1 200U

#define	IMX_SC_R_GPIO_2 201U

#define	IMX_SC_R_GPIO_3 202U

#define	IMX_SC_R_GPIO_4 203U

#define	IMX_SC_R_GPIO_5 204U

#define	IMX_SC_R_GPIO_6 205U

#define	IMX_SC_R_GPIO_7 206U

#define	IMX_SC_R_GPT_0 207U

#define	IMX_SC_R_GPT_1 208U

#define	IMX_SC_R_GPT_2 209U

#define	IMX_SC_R_GPT_3 210U

#define	IMX_SC_R_GPT_4 211U

#define	IMX_SC_R_KPP 212U

#define	IMX_SC_R_MU_0A 213U

#define	IMX_SC_R_MU_1A 214U

#define	IMX_SC_R_MU_2A 215U

#define	IMX_SC_R_MU_3A 216U

#define	IMX_SC_R_MU_4A 217U

#define	IMX_SC_R_MU_5A 218U

#define	IMX_SC_R_MU_6A 219U

#define	IMX_SC_R_MU_7A 220U

#define	IMX_SC_R_MU_8A 221U

#define	IMX_SC_R_MU_9A 222U

#define	IMX_SC_R_MU_10A 223U

#define	IMX_SC_R_MU_11A 224U

#define	IMX_SC_R_MU_12A 225U

#define	IMX_SC_R_MU_13A 226U

#define	IMX_SC_R_MU_5B 227U

#define	IMX_SC_R_MU_6B 228U

#define	IMX_SC_R_MU_7B 229U

#define	IMX_SC_R_MU_8B 230U

#define	IMX_SC_R_MU_9B 231U

#define	IMX_SC_R_MU_10B 232U

#define	IMX_SC_R_MU_11B 233U

#define	IMX_SC_R_MU_12B 234U

#define	IMX_SC_R_MU_13B 235U

#define	IMX_SC_R_ROM_0 236U

#define	IMX_SC_R_FSPI_0 237U

#define	IMX_SC_R_FSPI_1 238U

#define	IMX_SC_R_IEE 239U

#define	IMX_SC_R_IEE_R0 240U

#define	IMX_SC_R_IEE_R1 241U

#define	IMX_SC_R_IEE_R2 242U

#define	IMX_SC_R_IEE_R3 243U

#define	IMX_SC_R_IEE_R4 244U

#define	IMX_SC_R_IEE_R5 245U

#define	IMX_SC_R_IEE_R6 246U

#define	IMX_SC_R_IEE_R7 247U

#define	IMX_SC_R_SDHC_0 248U

#define	IMX_SC_R_SDHC_1 249U

#define	IMX_SC_R_SDHC_2 250U

#define	IMX_SC_R_ENET_0 251U

#define	IMX_SC_R_ENET_1 252U

#define	IMX_SC_R_MLB_0 253U

#define	IMX_SC_R_DMA_2_CH0 254U

#define	IMX_SC_R_DMA_2_CH1 255U

#define	IMX_SC_R_DMA_2_CH2 256U

#define	IMX_SC_R_DMA_2_CH3 257U

#define	IMX_SC_R_DMA_2_CH4 258U

#define	IMX_SC_R_USB_0 259U

#define	IMX_SC_R_USB_1 260U

#define	IMX_SC_R_USB_0_PHY 261U

#define	IMX_SC_R_USB_2 262U

#define	IMX_SC_R_USB_2_PHY 263U

#define	IMX_SC_R_DTCP 264U

#define	IMX_SC_R_NAND 265U

#define	IMX_SC_R_LVDS_0 266U

#define	IMX_SC_R_LVDS_0_PWM_0 267U

#define	IMX_SC_R_LVDS_0_I2C_0 268U

#define	IMX_SC_R_LVDS_0_I2C_1 269U

#define	IMX_SC_R_LVDS_1 270U

#define	IMX_SC_R_LVDS_1_PWM_0 271U

#define	IMX_SC_R_LVDS_1_I2C_0 272U

#define	IMX_SC_R_LVDS_1_I2C_1 273U

#define	IMX_SC_R_LVDS_2 274U

#define	IMX_SC_R_LVDS_2_PWM_0 275U

#define	IMX_SC_R_LVDS_2_I2C_0 276U

#define	IMX_SC_R_LVDS_2_I2C_1 277U

#define	IMX_SC_R_M4_0_PID0 278U

#define	IMX_SC_R_M4_0_PID1 279U

#define	IMX_SC_R_M4_0_PID2 280U

#define	IMX_SC_R_M4_0_PID3 281U

#define	IMX_SC_R_M4_0_PID4 282U

#define	IMX_SC_R_M4_0_RGPIO 283U

#define	IMX_SC_R_M4_0_SEMA42 284U

#define	IMX_SC_R_M4_0_TPM 285U

#define	IMX_SC_R_M4_0_PIT 286U

#define	IMX_SC_R_M4_0_UART 287U

#define	IMX_SC_R_M4_0_I2C 288U

#define	IMX_SC_R_M4_0_INTMUX 289U

#define	IMX_SC_R_ENET_0_A0 290U

#define	IMX_SC_R_ENET_0_A1 291U

#define	IMX_SC_R_M4_0_MU_0B 292U

#define	IMX_SC_R_M4_0_MU_0A0 293U

#define	IMX_SC_R_M4_0_MU_0A1 294U

#define	IMX_SC_R_M4_0_MU_0A2 295U

#define	IMX_SC_R_M4_0_MU_0A3 296U

#define	IMX_SC_R_M4_0_MU_1A 297U

#define	IMX_SC_R_M4_1_PID0 298U

#define	IMX_SC_R_M4_1_PID1 299U

#define	IMX_SC_R_M4_1_PID2 300U

#define	IMX_SC_R_M4_1_PID3 301U

#define	IMX_SC_R_M4_1_PID4 302U

#define	IMX_SC_R_M4_1_RGPIO 303U

#define	IMX_SC_R_M4_1_SEMA42 304U

#define	IMX_SC_R_M4_1_TPM 305U

#define	IMX_SC_R_M4_1_PIT 306U

#define	IMX_SC_R_M4_1_UART 307U

#define	IMX_SC_R_M4_1_I2C 308U

#define	IMX_SC_R_M4_1_INTMUX 309U

#define	IMX_SC_R_UNUSED17 310U

#define	IMX_SC_R_UNUSED18 311U

#define	IMX_SC_R_M4_1_MU_0B 312U

#define	IMX_SC_R_M4_1_MU_0A0 313U

#define	IMX_SC_R_M4_1_MU_0A1 314U

#define	IMX_SC_R_M4_1_MU_0A2 315U

#define	IMX_SC_R_M4_1_MU_0A3 316U

#define	IMX_SC_R_M4_1_MU_1A 317U

#define	IMX_SC_R_SAI_0 318U

#define	IMX_SC_R_SAI_1 319U

#define	IMX_SC_R_SAI_2 320U

#define	IMX_SC_R_IRQSTR_SCU2 321U

#define	IMX_SC_R_IRQSTR_DSP 322U

#define	IMX_SC_R_ELCDIF_PLL 323U

#define	IMX_SC_R_OCRAM 324U

#define	IMX_SC_R_AUDIO_PLL_0 325U

#define	IMX_SC_R_PI_0 326U

#define	IMX_SC_R_PI_0_PWM_0 327U

#define	IMX_SC_R_PI_0_PWM_1 328U

#define	IMX_SC_R_PI_0_I2C_0 329U

#define	IMX_SC_R_PI_0_PLL 330U

#define	IMX_SC_R_PI_1 331U

#define	IMX_SC_R_PI_1_PWM_0 332U

#define	IMX_SC_R_PI_1_PWM_1 333U

#define	IMX_SC_R_PI_1_I2C_0 334U

#define	IMX_SC_R_PI_1_PLL 335U

#define	IMX_SC_R_SC_PID0 336U

#define	IMX_SC_R_SC_PID1 337U

#define	IMX_SC_R_SC_PID2 338U

#define	IMX_SC_R_SC_PID3 339U

#define	IMX_SC_R_SC_PID4 340U

#define	IMX_SC_R_SC_SEMA42 341U

#define	IMX_SC_R_SC_TPM 342U

#define	IMX_SC_R_SC_PIT 343U

#define	IMX_SC_R_SC_UART 344U

#define	IMX_SC_R_SC_I2C 345U

#define	IMX_SC_R_SC_MU_0B 346U

#define	IMX_SC_R_SC_MU_0A0 347U

#define	IMX_SC_R_SC_MU_0A1 348U

#define	IMX_SC_R_SC_MU_0A2 349U

#define	IMX_SC_R_SC_MU_0A3 350U

#define	IMX_SC_R_SC_MU_1A 351U

#define	IMX_SC_R_SYSCNT_RD 352U

#define	IMX_SC_R_SYSCNT_CMP 353U

#define	IMX_SC_R_DEBUG 354U

#define	IMX_SC_R_SYSTEM 355U

#define	IMX_SC_R_SNVS 356U

#define	IMX_SC_R_OTP 357U

#define	IMX_SC_R_VPU_PID0 358U

#define	IMX_SC_R_VPU_PID1 359U

#define	IMX_SC_R_VPU_PID2 360U

#define	IMX_SC_R_VPU_PID3 361U

#define	IMX_SC_R_VPU_PID4 362U

#define	IMX_SC_R_VPU_PID5 363U

#define	IMX_SC_R_VPU_PID6 364U

#define	IMX_SC_R_VPU_PID7 365U

#define	IMX_SC_R_ENET_0_A2 366U

#define	IMX_SC_R_ENET_1_A0 367U

#define	IMX_SC_R_ENET_1_A1 368U

#define	IMX_SC_R_ENET_1_A2 369U

#define	IMX_SC_R_ENET_1_A3 370U

#define	IMX_SC_R_ENET_1_A4 371U

#define	IMX_SC_R_DMA_4_CH0 372U

#define	IMX_SC_R_DMA_4_CH1 373U

#define	IMX_SC_R_DMA_4_CH2 374U

#define	IMX_SC_R_DMA_4_CH3 375U

#define	IMX_SC_R_DMA_4_CH4 376U

#define	IMX_SC_R_ISI_CH0 377U

#define	IMX_SC_R_ISI_CH1 378U

#define	IMX_SC_R_ISI_CH2 379U

#define	IMX_SC_R_ISI_CH3 380U

#define	IMX_SC_R_ISI_CH4 381U

#define	IMX_SC_R_ISI_CH5 382U

#define	IMX_SC_R_ISI_CH6 383U

#define	IMX_SC_R_ISI_CH7 384U

#define	IMX_SC_R_MJPEG_DEC_S0 385U

#define	IMX_SC_R_MJPEG_DEC_S1 386U

#define	IMX_SC_R_MJPEG_DEC_S2 387U

#define	IMX_SC_R_MJPEG_DEC_S3 388U

#define	IMX_SC_R_MJPEG_ENC_S0 389U

#define	IMX_SC_R_MJPEG_ENC_S1 390U

#define	IMX_SC_R_MJPEG_ENC_S2 391U

#define	IMX_SC_R_MJPEG_ENC_S3 392U

#define	IMX_SC_R_MIPI_0 393U

#define	IMX_SC_R_MIPI_0_PWM_0 394U

#define	IMX_SC_R_MIPI_0_I2C_0 395U

#define	IMX_SC_R_MIPI_0_I2C_1 396U

#define	IMX_SC_R_MIPI_1 397U

#define	IMX_SC_R_MIPI_1_PWM_0 398U

#define	IMX_SC_R_MIPI_1_I2C_0 399U

#define	IMX_SC_R_MIPI_1_I2C_1 400U

#define	IMX_SC_R_CSI_0 401U

#define	IMX_SC_R_CSI_0_PWM_0 402U

#define	IMX_SC_R_CSI_0_I2C_0 403U

#define	IMX_SC_R_CSI_1 404U

#define	IMX_SC_R_CSI_1_PWM_0 405U

#define	IMX_SC_R_CSI_1_I2C_0 406U

#define	IMX_SC_R_HDMI 407U

#define	IMX_SC_R_HDMI_I2S 408U

#define	IMX_SC_R_HDMI_I2C_0 409U

#define	IMX_SC_R_HDMI_PLL_0 410U

#define	IMX_SC_R_HDMI_RX 411U

#define	IMX_SC_R_HDMI_RX_BYPASS 412U

#define	IMX_SC_R_HDMI_RX_I2C_0 413U

#define	IMX_SC_R_ASRC_0 414U

#define	IMX_SC_R_ESAI_0 415U

#define	IMX_SC_R_SPDIF_0 416U

#define	IMX_SC_R_SPDIF_1 417U

#define	IMX_SC_R_SAI_3 418U

#define	IMX_SC_R_SAI_4 419U

#define	IMX_SC_R_SAI_5 420U

#define	IMX_SC_R_GPT_5 421U

#define	IMX_SC_R_GPT_6 422U

#define	IMX_SC_R_GPT_7 423U

#define	IMX_SC_R_GPT_8 424U

#define	IMX_SC_R_GPT_9 425U

#define	IMX_SC_R_GPT_10 426U

#define	IMX_SC_R_DMA_2_CH5 427U

#define	IMX_SC_R_DMA_2_CH6 428U

#define	IMX_SC_R_DMA_2_CH7 429U

#define	IMX_SC_R_DMA_2_CH8 430U

#define	IMX_SC_R_DMA_2_CH9 431U

#define	IMX_SC_R_DMA_2_CH10 432U

#define	IMX_SC_R_DMA_2_CH11 433U

#define	IMX_SC_R_DMA_2_CH12 434U

#define	IMX_SC_R_DMA_2_CH13 435U

#define	IMX_SC_R_DMA_2_CH14 436U

#define	IMX_SC_R_DMA_2_CH15 437U

#define	IMX_SC_R_DMA_2_CH16 438U

#define	IMX_SC_R_DMA_2_CH17 439U

#define	IMX_SC_R_DMA_2_CH18 440U

#define	IMX_SC_R_DMA_2_CH19 441U

#define	IMX_SC_R_DMA_2_CH20 442U

#define	IMX_SC_R_DMA_2_CH21 443U

#define	IMX_SC_R_DMA_2_CH22 444U

#define	IMX_SC_R_DMA_2_CH23 445U

#define	IMX_SC_R_DMA_2_CH24 446U

#define	IMX_SC_R_DMA_2_CH25 447U

#define	IMX_SC_R_DMA_2_CH26 448U

#define	IMX_SC_R_DMA_2_CH27 449U

#define	IMX_SC_R_DMA_2_CH28 450U

#define	IMX_SC_R_DMA_2_CH29 451U

#define	IMX_SC_R_DMA_2_CH30 452U

#define	IMX_SC_R_DMA_2_CH31 453U

#define	IMX_SC_R_ASRC_1 454U

#define	IMX_SC_R_ESAI_1 455U

#define	IMX_SC_R_SAI_6 456U

#define	IMX_SC_R_SAI_7 457U

#define	IMX_SC_R_AMIX 458U

#define	IMX_SC_R_MQS_0 459U

#define	IMX_SC_R_DMA_3_CH0 460U

#define	IMX_SC_R_DMA_3_CH1 461U

#define	IMX_SC_R_DMA_3_CH2 462U

#define	IMX_SC_R_DMA_3_CH3 463U

#define	IMX_SC_R_DMA_3_CH4 464U

#define	IMX_SC_R_DMA_3_CH5 465U

#define	IMX_SC_R_DMA_3_CH6 466U

#define	IMX_SC_R_DMA_3_CH7 467U

#define	IMX_SC_R_DMA_3_CH8 468U

#define	IMX_SC_R_DMA_3_CH9 469U

#define	IMX_SC_R_DMA_3_CH10 470U

#define	IMX_SC_R_DMA_3_CH11 471U

#define	IMX_SC_R_DMA_3_CH12 472U

#define	IMX_SC_R_DMA_3_CH13 473U

#define	IMX_SC_R_DMA_3_CH14 474U

#define	IMX_SC_R_DMA_3_CH15 475U

#define	IMX_SC_R_DMA_3_CH16 476U

#define	IMX_SC_R_DMA_3_CH17 477U

#define	IMX_SC_R_DMA_3_CH18 478U

#define	IMX_SC_R_DMA_3_CH19 479U

#define	IMX_SC_R_DMA_3_CH20 480U

#define	IMX_SC_R_DMA_3_CH21 481U

#define	IMX_SC_R_DMA_3_CH22 482U

#define	IMX_SC_R_DMA_3_CH23 483U

#define	IMX_SC_R_DMA_3_CH24 484U

#define	IMX_SC_R_DMA_3_CH25 485U

#define	IMX_SC_R_DMA_3_CH26 486U

#define	IMX_SC_R_DMA_3_CH27 487U

#define	IMX_SC_R_DMA_3_CH28 488U

#define	IMX_SC_R_DMA_3_CH29 489U

#define	IMX_SC_R_DMA_3_CH30 490U

#define	IMX_SC_R_DMA_3_CH31 491U

#define	IMX_SC_R_AUDIO_PLL_1 492U

#define	IMX_SC_R_AUDIO_CLK_0 493U

#define	IMX_SC_R_AUDIO_CLK_1 494U

#define	IMX_SC_R_MCLK_OUT_0 495U

#define	IMX_SC_R_MCLK_OUT_1 496U

#define	IMX_SC_R_PMIC_0 497U

#define	IMX_SC_R_PMIC_1 498U

#define	IMX_SC_R_SECO 499U

#define	IMX_SC_R_CAAM_JR1 500U

#define	IMX_SC_R_CAAM_JR2 501U

#define	IMX_SC_R_CAAM_JR3 502U

#define	IMX_SC_R_SECO_MU_2 503U

#define	IMX_SC_R_SECO_MU_3 504U

#define	IMX_SC_R_SECO_MU_4 505U

#define	IMX_SC_R_HDMI_RX_PWM_0 506U

#define	IMX_SC_R_A35 507U

#define	IMX_SC_R_A35_0 508U

#define	IMX_SC_R_A35_1 509U

#define	IMX_SC_R_A35_2 510U

#define	IMX_SC_R_A35_3 511U

#define	IMX_SC_R_DSP 512U

#define	IMX_SC_R_DSP_RAM 513U

#define	IMX_SC_R_CAAM_JR1_OUT 514U

#define	IMX_SC_R_CAAM_JR2_OUT 515U

#define	IMX_SC_R_CAAM_JR3_OUT 516U

#define	IMX_SC_R_VPU_DEC_0 517U

#define	IMX_SC_R_VPU_ENC_0 518U

#define	IMX_SC_R_CAAM_JR0 519U

#define	IMX_SC_R_CAAM_JR0_OUT 520U

#define	IMX_SC_R_PMIC_2 521U

#define	IMX_SC_R_DBLOGIC 522U

#define	IMX_SC_R_HDMI_PLL_1 523U

#define	IMX_SC_R_BOARD_R0 524U

#define	IMX_SC_R_BOARD_R1 525U

#define	IMX_SC_R_BOARD_R2 526U

#define	IMX_SC_R_BOARD_R3 527U

#define	IMX_SC_R_BOARD_R4 528U

#define	IMX_SC_R_BOARD_R5 529U

#define	IMX_SC_R_BOARD_R6 530U

#define	IMX_SC_R_BOARD_R7 531U

#define	IMX_SC_R_MJPEG_DEC_MP 532U

#define	IMX_SC_R_MJPEG_ENC_MP 533U

#define	IMX_SC_R_VPU_TS_0 534U

#define	IMX_SC_R_VPU_MU_0 535U

#define	IMX_SC_R_VPU_MU_1 536U

#define	IMX_SC_R_VPU_MU_2 537U

#define	IMX_SC_R_VPU_MU_3 538U

#define	IMX_SC_R_VPU_ENC_1 539U

#define	IMX_SC_R_VPU 540U

#define	IMX_SC_R_DMA_5_CH0 541U

#define	IMX_SC_R_DMA_5_CH1 542U

#define	IMX_SC_R_DMA_5_CH2 543U

#define	IMX_SC_R_DMA_5_CH3 544U

#define	IMX_SC_R_ATTESTATION 545U

#define	IMX_SC_R_LAST 546U

Macro Definition Documentation

◆ IMX_SC_R_A35

#define IMX_SC_R_A35 507U

◆ IMX_SC_R_A35_0

#define IMX_SC_R_A35_0 508U

◆ IMX_SC_R_A35_1

#define IMX_SC_R_A35_1 509U

◆ IMX_SC_R_A35_2

#define IMX_SC_R_A35_2 510U

◆ IMX_SC_R_A35_3

#define IMX_SC_R_A35_3 511U

◆ IMX_SC_R_A53

#define IMX_SC_R_A53 0U

◆ IMX_SC_R_A53_0

#define IMX_SC_R_A53_0 1U

◆ IMX_SC_R_A53_1

#define IMX_SC_R_A53_1 2U

◆ IMX_SC_R_A53_2

#define IMX_SC_R_A53_2 3U

◆ IMX_SC_R_A53_3

#define IMX_SC_R_A53_3 4U

◆ IMX_SC_R_A72

#define IMX_SC_R_A72 5U

◆ IMX_SC_R_A72_0

#define IMX_SC_R_A72_0 6U

◆ IMX_SC_R_A72_1

#define IMX_SC_R_A72_1 7U

◆ IMX_SC_R_A72_2

#define IMX_SC_R_A72_2 8U

◆ IMX_SC_R_A72_3

#define IMX_SC_R_A72_3 9U

◆ IMX_SC_R_ADC_0

#define IMX_SC_R_ADC_0 101U

◆ IMX_SC_R_ADC_1

#define IMX_SC_R_ADC_1 102U

◆ IMX_SC_R_AMIX

#define IMX_SC_R_AMIX 458U

◆ IMX_SC_R_ASRC_0

#define IMX_SC_R_ASRC_0 414U

◆ IMX_SC_R_ASRC_1

#define IMX_SC_R_ASRC_1 454U

◆ IMX_SC_R_ATTESTATION

#define IMX_SC_R_ATTESTATION 545U

◆ IMX_SC_R_AUDIO_CLK_0

#define IMX_SC_R_AUDIO_CLK_0 493U

◆ IMX_SC_R_AUDIO_CLK_1

#define IMX_SC_R_AUDIO_CLK_1 494U

◆ IMX_SC_R_AUDIO_PLL_0

#define IMX_SC_R_AUDIO_PLL_0 325U

◆ IMX_SC_R_AUDIO_PLL_1

#define IMX_SC_R_AUDIO_PLL_1 492U

◆ IMX_SC_R_BOARD_R0

#define IMX_SC_R_BOARD_R0 524U

◆ IMX_SC_R_BOARD_R1

#define IMX_SC_R_BOARD_R1 525U

◆ IMX_SC_R_BOARD_R2

#define IMX_SC_R_BOARD_R2 526U

◆ IMX_SC_R_BOARD_R3

#define IMX_SC_R_BOARD_R3 527U

◆ IMX_SC_R_BOARD_R4

#define IMX_SC_R_BOARD_R4 528U

◆ IMX_SC_R_BOARD_R5

#define IMX_SC_R_BOARD_R5 529U

◆ IMX_SC_R_BOARD_R6

#define IMX_SC_R_BOARD_R6 530U

◆ IMX_SC_R_BOARD_R7

#define IMX_SC_R_BOARD_R7 531U

◆ IMX_SC_R_CAAM_JR0

#define IMX_SC_R_CAAM_JR0 519U

◆ IMX_SC_R_CAAM_JR0_OUT

#define IMX_SC_R_CAAM_JR0_OUT 520U

◆ IMX_SC_R_CAAM_JR1

#define IMX_SC_R_CAAM_JR1 500U

◆ IMX_SC_R_CAAM_JR1_OUT

#define IMX_SC_R_CAAM_JR1_OUT 514U

◆ IMX_SC_R_CAAM_JR2

#define IMX_SC_R_CAAM_JR2 501U

◆ IMX_SC_R_CAAM_JR2_OUT

#define IMX_SC_R_CAAM_JR2_OUT 515U

◆ IMX_SC_R_CAAM_JR3

#define IMX_SC_R_CAAM_JR3 502U

◆ IMX_SC_R_CAAM_JR3_OUT

#define IMX_SC_R_CAAM_JR3_OUT 516U

◆ IMX_SC_R_CAN_0

#define IMX_SC_R_CAN_0 105U

◆ IMX_SC_R_CAN_1

#define IMX_SC_R_CAN_1 106U

◆ IMX_SC_R_CAN_2

#define IMX_SC_R_CAN_2 107U

◆ IMX_SC_R_CCI

#define IMX_SC_R_CCI 10U

◆ IMX_SC_R_CSI_0

#define IMX_SC_R_CSI_0 401U

◆ IMX_SC_R_CSI_0_I2C_0

#define IMX_SC_R_CSI_0_I2C_0 403U

◆ IMX_SC_R_CSI_0_PWM_0

#define IMX_SC_R_CSI_0_PWM_0 402U

◆ IMX_SC_R_CSI_1

#define IMX_SC_R_CSI_1 404U

◆ IMX_SC_R_CSI_1_I2C_0

#define IMX_SC_R_CSI_1_I2C_0 406U

◆ IMX_SC_R_CSI_1_PWM_0

#define IMX_SC_R_CSI_1_PWM_0 405U

◆ IMX_SC_R_DB

#define IMX_SC_R_DB 11U

◆ IMX_SC_R_DBLOGIC

#define IMX_SC_R_DBLOGIC 522U

◆ IMX_SC_R_DC_0

#define IMX_SC_R_DC_0 32U

◆ IMX_SC_R_DC_0_BLIT0

#define IMX_SC_R_DC_0_BLIT0 19U

◆ IMX_SC_R_DC_0_BLIT1

#define IMX_SC_R_DC_0_BLIT1 20U

◆ IMX_SC_R_DC_0_BLIT2

#define IMX_SC_R_DC_0_BLIT2 21U

◆ IMX_SC_R_DC_0_BLIT_OUT

#define IMX_SC_R_DC_0_BLIT_OUT 22U

◆ IMX_SC_R_DC_0_FRAC0

#define IMX_SC_R_DC_0_FRAC0 30U

◆ IMX_SC_R_DC_0_PLL_0

#define IMX_SC_R_DC_0_PLL_0 34U

◆ IMX_SC_R_DC_0_PLL_1

#define IMX_SC_R_DC_0_PLL_1 35U

◆ IMX_SC_R_DC_0_VIDEO0

#define IMX_SC_R_DC_0_VIDEO0 28U

◆ IMX_SC_R_DC_0_VIDEO1

#define IMX_SC_R_DC_0_VIDEO1 29U

◆ IMX_SC_R_DC_0_WARP

#define IMX_SC_R_DC_0_WARP 25U

◆ IMX_SC_R_DC_1

#define IMX_SC_R_DC_1 49U

◆ IMX_SC_R_DC_1_BLIT0

#define IMX_SC_R_DC_1_BLIT0 36U

◆ IMX_SC_R_DC_1_BLIT1

#define IMX_SC_R_DC_1_BLIT1 37U

◆ IMX_SC_R_DC_1_BLIT2

#define IMX_SC_R_DC_1_BLIT2 38U

◆ IMX_SC_R_DC_1_BLIT_OUT

#define IMX_SC_R_DC_1_BLIT_OUT 39U

◆ IMX_SC_R_DC_1_FRAC0

#define IMX_SC_R_DC_1_FRAC0 47U

◆ IMX_SC_R_DC_1_PLL_0

#define IMX_SC_R_DC_1_PLL_0 51U

◆ IMX_SC_R_DC_1_PLL_1

#define IMX_SC_R_DC_1_PLL_1 52U

◆ IMX_SC_R_DC_1_VIDEO0

#define IMX_SC_R_DC_1_VIDEO0 45U

◆ IMX_SC_R_DC_1_VIDEO1

#define IMX_SC_R_DC_1_VIDEO1 46U

◆ IMX_SC_R_DC_1_WARP

#define IMX_SC_R_DC_1_WARP 42U

◆ IMX_SC_R_DEBUG

#define IMX_SC_R_DEBUG 354U

◆ IMX_SC_R_DMA_0_CH0

#define IMX_SC_R_DMA_0_CH0 64U

◆ IMX_SC_R_DMA_0_CH1

#define IMX_SC_R_DMA_0_CH1 65U

◆ IMX_SC_R_DMA_0_CH10

#define IMX_SC_R_DMA_0_CH10 74U

◆ IMX_SC_R_DMA_0_CH11

#define IMX_SC_R_DMA_0_CH11 75U

◆ IMX_SC_R_DMA_0_CH12

#define IMX_SC_R_DMA_0_CH12 76U

◆ IMX_SC_R_DMA_0_CH13

#define IMX_SC_R_DMA_0_CH13 77U

◆ IMX_SC_R_DMA_0_CH14

#define IMX_SC_R_DMA_0_CH14 78U

◆ IMX_SC_R_DMA_0_CH15

#define IMX_SC_R_DMA_0_CH15 79U

◆ IMX_SC_R_DMA_0_CH16

#define IMX_SC_R_DMA_0_CH16 80U

◆ IMX_SC_R_DMA_0_CH17

#define IMX_SC_R_DMA_0_CH17 81U

◆ IMX_SC_R_DMA_0_CH18

#define IMX_SC_R_DMA_0_CH18 82U

◆ IMX_SC_R_DMA_0_CH19

#define IMX_SC_R_DMA_0_CH19 83U

◆ IMX_SC_R_DMA_0_CH2

#define IMX_SC_R_DMA_0_CH2 66U

◆ IMX_SC_R_DMA_0_CH20

#define IMX_SC_R_DMA_0_CH20 84U

◆ IMX_SC_R_DMA_0_CH21

#define IMX_SC_R_DMA_0_CH21 85U

◆ IMX_SC_R_DMA_0_CH22

#define IMX_SC_R_DMA_0_CH22 86U

◆ IMX_SC_R_DMA_0_CH23

#define IMX_SC_R_DMA_0_CH23 87U

◆ IMX_SC_R_DMA_0_CH24

#define IMX_SC_R_DMA_0_CH24 88U

◆ IMX_SC_R_DMA_0_CH25

#define IMX_SC_R_DMA_0_CH25 89U

◆ IMX_SC_R_DMA_0_CH26

#define IMX_SC_R_DMA_0_CH26 90U

◆ IMX_SC_R_DMA_0_CH27

#define IMX_SC_R_DMA_0_CH27 91U

◆ IMX_SC_R_DMA_0_CH28

#define IMX_SC_R_DMA_0_CH28 92U

◆ IMX_SC_R_DMA_0_CH29

#define IMX_SC_R_DMA_0_CH29 93U

◆ IMX_SC_R_DMA_0_CH3

#define IMX_SC_R_DMA_0_CH3 67U

◆ IMX_SC_R_DMA_0_CH30

#define IMX_SC_R_DMA_0_CH30 94U

◆ IMX_SC_R_DMA_0_CH31

#define IMX_SC_R_DMA_0_CH31 95U

◆ IMX_SC_R_DMA_0_CH4

#define IMX_SC_R_DMA_0_CH4 68U

◆ IMX_SC_R_DMA_0_CH5

#define IMX_SC_R_DMA_0_CH5 69U

◆ IMX_SC_R_DMA_0_CH6

#define IMX_SC_R_DMA_0_CH6 70U

◆ IMX_SC_R_DMA_0_CH7

#define IMX_SC_R_DMA_0_CH7 71U

◆ IMX_SC_R_DMA_0_CH8

#define IMX_SC_R_DMA_0_CH8 72U

◆ IMX_SC_R_DMA_0_CH9

#define IMX_SC_R_DMA_0_CH9 73U

◆ IMX_SC_R_DMA_1_CH0

#define IMX_SC_R_DMA_1_CH0 108U

◆ IMX_SC_R_DMA_1_CH1

#define IMX_SC_R_DMA_1_CH1 109U

◆ IMX_SC_R_DMA_1_CH10

#define IMX_SC_R_DMA_1_CH10 118U

◆ IMX_SC_R_DMA_1_CH11

#define IMX_SC_R_DMA_1_CH11 119U

◆ IMX_SC_R_DMA_1_CH12

#define IMX_SC_R_DMA_1_CH12 120U

◆ IMX_SC_R_DMA_1_CH13

#define IMX_SC_R_DMA_1_CH13 121U

◆ IMX_SC_R_DMA_1_CH14

#define IMX_SC_R_DMA_1_CH14 122U

◆ IMX_SC_R_DMA_1_CH15

#define IMX_SC_R_DMA_1_CH15 123U

◆ IMX_SC_R_DMA_1_CH16

#define IMX_SC_R_DMA_1_CH16 124U

◆ IMX_SC_R_DMA_1_CH17

#define IMX_SC_R_DMA_1_CH17 125U

◆ IMX_SC_R_DMA_1_CH18

#define IMX_SC_R_DMA_1_CH18 126U

◆ IMX_SC_R_DMA_1_CH19

#define IMX_SC_R_DMA_1_CH19 127U

◆ IMX_SC_R_DMA_1_CH2

#define IMX_SC_R_DMA_1_CH2 110U

◆ IMX_SC_R_DMA_1_CH20

#define IMX_SC_R_DMA_1_CH20 128U

◆ IMX_SC_R_DMA_1_CH21

#define IMX_SC_R_DMA_1_CH21 129U

◆ IMX_SC_R_DMA_1_CH22

#define IMX_SC_R_DMA_1_CH22 130U

◆ IMX_SC_R_DMA_1_CH23

#define IMX_SC_R_DMA_1_CH23 131U

◆ IMX_SC_R_DMA_1_CH24

#define IMX_SC_R_DMA_1_CH24 132U

◆ IMX_SC_R_DMA_1_CH25

#define IMX_SC_R_DMA_1_CH25 133U

◆ IMX_SC_R_DMA_1_CH26

#define IMX_SC_R_DMA_1_CH26 134U

◆ IMX_SC_R_DMA_1_CH27

#define IMX_SC_R_DMA_1_CH27 135U

◆ IMX_SC_R_DMA_1_CH28

#define IMX_SC_R_DMA_1_CH28 136U

◆ IMX_SC_R_DMA_1_CH29

#define IMX_SC_R_DMA_1_CH29 137U

◆ IMX_SC_R_DMA_1_CH3

#define IMX_SC_R_DMA_1_CH3 111U

◆ IMX_SC_R_DMA_1_CH30

#define IMX_SC_R_DMA_1_CH30 138U

◆ IMX_SC_R_DMA_1_CH31

#define IMX_SC_R_DMA_1_CH31 139U

◆ IMX_SC_R_DMA_1_CH4

#define IMX_SC_R_DMA_1_CH4 112U

◆ IMX_SC_R_DMA_1_CH5

#define IMX_SC_R_DMA_1_CH5 113U

◆ IMX_SC_R_DMA_1_CH6

#define IMX_SC_R_DMA_1_CH6 114U

◆ IMX_SC_R_DMA_1_CH7

#define IMX_SC_R_DMA_1_CH7 115U

◆ IMX_SC_R_DMA_1_CH8

#define IMX_SC_R_DMA_1_CH8 116U

◆ IMX_SC_R_DMA_1_CH9

#define IMX_SC_R_DMA_1_CH9 117U

◆ IMX_SC_R_DMA_2_CH0

#define IMX_SC_R_DMA_2_CH0 254U

◆ IMX_SC_R_DMA_2_CH1

#define IMX_SC_R_DMA_2_CH1 255U

◆ IMX_SC_R_DMA_2_CH10

#define IMX_SC_R_DMA_2_CH10 432U

◆ IMX_SC_R_DMA_2_CH11

#define IMX_SC_R_DMA_2_CH11 433U

◆ IMX_SC_R_DMA_2_CH12

#define IMX_SC_R_DMA_2_CH12 434U

◆ IMX_SC_R_DMA_2_CH13

#define IMX_SC_R_DMA_2_CH13 435U

◆ IMX_SC_R_DMA_2_CH14

#define IMX_SC_R_DMA_2_CH14 436U

◆ IMX_SC_R_DMA_2_CH15

#define IMX_SC_R_DMA_2_CH15 437U

◆ IMX_SC_R_DMA_2_CH16

#define IMX_SC_R_DMA_2_CH16 438U

◆ IMX_SC_R_DMA_2_CH17

#define IMX_SC_R_DMA_2_CH17 439U

◆ IMX_SC_R_DMA_2_CH18

#define IMX_SC_R_DMA_2_CH18 440U

◆ IMX_SC_R_DMA_2_CH19

#define IMX_SC_R_DMA_2_CH19 441U

◆ IMX_SC_R_DMA_2_CH2

#define IMX_SC_R_DMA_2_CH2 256U

◆ IMX_SC_R_DMA_2_CH20

#define IMX_SC_R_DMA_2_CH20 442U

◆ IMX_SC_R_DMA_2_CH21

#define IMX_SC_R_DMA_2_CH21 443U

◆ IMX_SC_R_DMA_2_CH22

#define IMX_SC_R_DMA_2_CH22 444U

◆ IMX_SC_R_DMA_2_CH23

#define IMX_SC_R_DMA_2_CH23 445U

◆ IMX_SC_R_DMA_2_CH24

#define IMX_SC_R_DMA_2_CH24 446U

◆ IMX_SC_R_DMA_2_CH25

#define IMX_SC_R_DMA_2_CH25 447U

◆ IMX_SC_R_DMA_2_CH26

#define IMX_SC_R_DMA_2_CH26 448U

◆ IMX_SC_R_DMA_2_CH27

#define IMX_SC_R_DMA_2_CH27 449U

◆ IMX_SC_R_DMA_2_CH28

#define IMX_SC_R_DMA_2_CH28 450U

◆ IMX_SC_R_DMA_2_CH29

#define IMX_SC_R_DMA_2_CH29 451U

◆ IMX_SC_R_DMA_2_CH3

#define IMX_SC_R_DMA_2_CH3 257U

◆ IMX_SC_R_DMA_2_CH30

#define IMX_SC_R_DMA_2_CH30 452U

◆ IMX_SC_R_DMA_2_CH31

#define IMX_SC_R_DMA_2_CH31 453U

◆ IMX_SC_R_DMA_2_CH4

#define IMX_SC_R_DMA_2_CH4 258U

◆ IMX_SC_R_DMA_2_CH5

#define IMX_SC_R_DMA_2_CH5 427U

◆ IMX_SC_R_DMA_2_CH6

#define IMX_SC_R_DMA_2_CH6 428U

◆ IMX_SC_R_DMA_2_CH7

#define IMX_SC_R_DMA_2_CH7 429U

◆ IMX_SC_R_DMA_2_CH8

#define IMX_SC_R_DMA_2_CH8 430U

◆ IMX_SC_R_DMA_2_CH9

#define IMX_SC_R_DMA_2_CH9 431U

◆ IMX_SC_R_DMA_3_CH0

#define IMX_SC_R_DMA_3_CH0 460U

◆ IMX_SC_R_DMA_3_CH1

#define IMX_SC_R_DMA_3_CH1 461U

◆ IMX_SC_R_DMA_3_CH10

#define IMX_SC_R_DMA_3_CH10 470U

◆ IMX_SC_R_DMA_3_CH11

#define IMX_SC_R_DMA_3_CH11 471U

◆ IMX_SC_R_DMA_3_CH12

#define IMX_SC_R_DMA_3_CH12 472U

◆ IMX_SC_R_DMA_3_CH13

#define IMX_SC_R_DMA_3_CH13 473U

◆ IMX_SC_R_DMA_3_CH14

#define IMX_SC_R_DMA_3_CH14 474U

◆ IMX_SC_R_DMA_3_CH15

#define IMX_SC_R_DMA_3_CH15 475U

◆ IMX_SC_R_DMA_3_CH16

#define IMX_SC_R_DMA_3_CH16 476U

◆ IMX_SC_R_DMA_3_CH17

#define IMX_SC_R_DMA_3_CH17 477U

◆ IMX_SC_R_DMA_3_CH18

#define IMX_SC_R_DMA_3_CH18 478U

◆ IMX_SC_R_DMA_3_CH19

#define IMX_SC_R_DMA_3_CH19 479U

◆ IMX_SC_R_DMA_3_CH2

#define IMX_SC_R_DMA_3_CH2 462U

◆ IMX_SC_R_DMA_3_CH20

#define IMX_SC_R_DMA_3_CH20 480U

◆ IMX_SC_R_DMA_3_CH21

#define IMX_SC_R_DMA_3_CH21 481U

◆ IMX_SC_R_DMA_3_CH22

#define IMX_SC_R_DMA_3_CH22 482U

◆ IMX_SC_R_DMA_3_CH23

#define IMX_SC_R_DMA_3_CH23 483U

◆ IMX_SC_R_DMA_3_CH24

#define IMX_SC_R_DMA_3_CH24 484U

◆ IMX_SC_R_DMA_3_CH25

#define IMX_SC_R_DMA_3_CH25 485U

◆ IMX_SC_R_DMA_3_CH26

#define IMX_SC_R_DMA_3_CH26 486U

◆ IMX_SC_R_DMA_3_CH27

#define IMX_SC_R_DMA_3_CH27 487U

◆ IMX_SC_R_DMA_3_CH28

#define IMX_SC_R_DMA_3_CH28 488U

◆ IMX_SC_R_DMA_3_CH29

#define IMX_SC_R_DMA_3_CH29 489U

◆ IMX_SC_R_DMA_3_CH3

#define IMX_SC_R_DMA_3_CH3 463U

◆ IMX_SC_R_DMA_3_CH30

#define IMX_SC_R_DMA_3_CH30 490U

◆ IMX_SC_R_DMA_3_CH31

#define IMX_SC_R_DMA_3_CH31 491U

◆ IMX_SC_R_DMA_3_CH4

#define IMX_SC_R_DMA_3_CH4 464U

◆ IMX_SC_R_DMA_3_CH5

#define IMX_SC_R_DMA_3_CH5 465U

◆ IMX_SC_R_DMA_3_CH6

#define IMX_SC_R_DMA_3_CH6 466U

◆ IMX_SC_R_DMA_3_CH7

#define IMX_SC_R_DMA_3_CH7 467U

◆ IMX_SC_R_DMA_3_CH8

#define IMX_SC_R_DMA_3_CH8 468U

◆ IMX_SC_R_DMA_3_CH9

#define IMX_SC_R_DMA_3_CH9 469U

◆ IMX_SC_R_DMA_4_CH0

#define IMX_SC_R_DMA_4_CH0 372U

◆ IMX_SC_R_DMA_4_CH1

#define IMX_SC_R_DMA_4_CH1 373U

◆ IMX_SC_R_DMA_4_CH2

#define IMX_SC_R_DMA_4_CH2 374U

◆ IMX_SC_R_DMA_4_CH3

#define IMX_SC_R_DMA_4_CH3 375U

◆ IMX_SC_R_DMA_4_CH4

#define IMX_SC_R_DMA_4_CH4 376U

◆ IMX_SC_R_DMA_5_CH0

#define IMX_SC_R_DMA_5_CH0 541U

◆ IMX_SC_R_DMA_5_CH1

#define IMX_SC_R_DMA_5_CH1 542U

◆ IMX_SC_R_DMA_5_CH2

#define IMX_SC_R_DMA_5_CH2 543U

◆ IMX_SC_R_DMA_5_CH3

#define IMX_SC_R_DMA_5_CH3 544U

◆ IMX_SC_R_DRC_0

#define IMX_SC_R_DRC_0 12U

◆ IMX_SC_R_DRC_1

#define IMX_SC_R_DRC_1 13U

◆ IMX_SC_R_DSP

#define IMX_SC_R_DSP 512U

◆ IMX_SC_R_DSP_RAM

#define IMX_SC_R_DSP_RAM 513U

◆ IMX_SC_R_DTCP

#define IMX_SC_R_DTCP 264U

◆ IMX_SC_R_ELCDIF_PLL

#define IMX_SC_R_ELCDIF_PLL 323U

◆ IMX_SC_R_EMVSIM_0

#define IMX_SC_R_EMVSIM_0 62U

◆ IMX_SC_R_EMVSIM_1

#define IMX_SC_R_EMVSIM_1 63U

◆ IMX_SC_R_ENET_0

#define IMX_SC_R_ENET_0 251U

◆ IMX_SC_R_ENET_0_A0

#define IMX_SC_R_ENET_0_A0 290U

◆ IMX_SC_R_ENET_0_A1

#define IMX_SC_R_ENET_0_A1 291U

◆ IMX_SC_R_ENET_0_A2

#define IMX_SC_R_ENET_0_A2 366U

◆ IMX_SC_R_ENET_1

#define IMX_SC_R_ENET_1 252U

◆ IMX_SC_R_ENET_1_A0

#define IMX_SC_R_ENET_1_A0 367U

◆ IMX_SC_R_ENET_1_A1

#define IMX_SC_R_ENET_1_A1 368U

◆ IMX_SC_R_ENET_1_A2

#define IMX_SC_R_ENET_1_A2 369U

◆ IMX_SC_R_ENET_1_A3

#define IMX_SC_R_ENET_1_A3 370U

◆ IMX_SC_R_ENET_1_A4

#define IMX_SC_R_ENET_1_A4 371U

◆ IMX_SC_R_ESAI_0

#define IMX_SC_R_ESAI_0 415U

◆ IMX_SC_R_ESAI_1

#define IMX_SC_R_ESAI_1 455U

◆ IMX_SC_R_FSPI_0

#define IMX_SC_R_FSPI_0 237U

◆ IMX_SC_R_FSPI_1

#define IMX_SC_R_FSPI_1 238U

◆ IMX_SC_R_FTM_0

#define IMX_SC_R_FTM_0 103U

◆ IMX_SC_R_FTM_1

#define IMX_SC_R_FTM_1 104U

◆ IMX_SC_R_GIC

#define IMX_SC_R_GIC 18U

◆ IMX_SC_R_GIC_SMMU

#define IMX_SC_R_GIC_SMMU 14U

◆ IMX_SC_R_GPIO_0

#define IMX_SC_R_GPIO_0 199U

◆ IMX_SC_R_GPIO_1

#define IMX_SC_R_GPIO_1 200U

◆ IMX_SC_R_GPIO_2

#define IMX_SC_R_GPIO_2 201U

◆ IMX_SC_R_GPIO_3

#define IMX_SC_R_GPIO_3 202U

◆ IMX_SC_R_GPIO_4

#define IMX_SC_R_GPIO_4 203U

◆ IMX_SC_R_GPIO_5

#define IMX_SC_R_GPIO_5 204U

◆ IMX_SC_R_GPIO_6

#define IMX_SC_R_GPIO_6 205U

◆ IMX_SC_R_GPIO_7

#define IMX_SC_R_GPIO_7 206U

◆ IMX_SC_R_GPT_0

#define IMX_SC_R_GPT_0 207U

◆ IMX_SC_R_GPT_1

#define IMX_SC_R_GPT_1 208U

◆ IMX_SC_R_GPT_10

#define IMX_SC_R_GPT_10 426U

◆ IMX_SC_R_GPT_2

#define IMX_SC_R_GPT_2 209U

◆ IMX_SC_R_GPT_3

#define IMX_SC_R_GPT_3 210U

◆ IMX_SC_R_GPT_4

#define IMX_SC_R_GPT_4 211U

◆ IMX_SC_R_GPT_5

#define IMX_SC_R_GPT_5 421U

◆ IMX_SC_R_GPT_6

#define IMX_SC_R_GPT_6 422U

◆ IMX_SC_R_GPT_7

#define IMX_SC_R_GPT_7 423U

◆ IMX_SC_R_GPT_8

#define IMX_SC_R_GPT_8 424U

◆ IMX_SC_R_GPT_9

#define IMX_SC_R_GPT_9 425U

◆ IMX_SC_R_GPU_0_PID0

#define IMX_SC_R_GPU_0_PID0 144U

◆ IMX_SC_R_GPU_0_PID1

#define IMX_SC_R_GPU_0_PID1 145U

◆ IMX_SC_R_GPU_0_PID2

#define IMX_SC_R_GPU_0_PID2 146U

◆ IMX_SC_R_GPU_0_PID3

#define IMX_SC_R_GPU_0_PID3 147U

◆ IMX_SC_R_GPU_1_PID0

#define IMX_SC_R_GPU_1_PID0 148U

◆ IMX_SC_R_GPU_1_PID1

#define IMX_SC_R_GPU_1_PID1 149U

◆ IMX_SC_R_GPU_1_PID2

#define IMX_SC_R_GPU_1_PID2 150U

◆ IMX_SC_R_GPU_1_PID3

#define IMX_SC_R_GPU_1_PID3 151U

◆ IMX_SC_R_GPU_2_PID0

#define IMX_SC_R_GPU_2_PID0 33U

◆ IMX_SC_R_HDMI

#define IMX_SC_R_HDMI 407U

◆ IMX_SC_R_HDMI_I2C_0

#define IMX_SC_R_HDMI_I2C_0 409U

◆ IMX_SC_R_HDMI_I2S

#define IMX_SC_R_HDMI_I2S 408U

◆ IMX_SC_R_HDMI_PLL_0

#define IMX_SC_R_HDMI_PLL_0 410U

◆ IMX_SC_R_HDMI_PLL_1

#define IMX_SC_R_HDMI_PLL_1 523U

◆ IMX_SC_R_HDMI_RX

#define IMX_SC_R_HDMI_RX 411U

◆ IMX_SC_R_HDMI_RX_BYPASS

#define IMX_SC_R_HDMI_RX_BYPASS 412U

◆ IMX_SC_R_HDMI_RX_I2C_0

#define IMX_SC_R_HDMI_RX_I2C_0 413U

◆ IMX_SC_R_HDMI_RX_PWM_0

#define IMX_SC_R_HDMI_RX_PWM_0 506U

◆ IMX_SC_R_HSIO_GPIO

#define IMX_SC_R_HSIO_GPIO 172U

◆ IMX_SC_R_I2C_0

#define IMX_SC_R_I2C_0 96U

◆ IMX_SC_R_I2C_1

#define IMX_SC_R_I2C_1 97U

◆ IMX_SC_R_I2C_2

#define IMX_SC_R_I2C_2 98U

◆ IMX_SC_R_I2C_3

#define IMX_SC_R_I2C_3 99U

◆ IMX_SC_R_I2C_4

#define IMX_SC_R_I2C_4 100U

◆ IMX_SC_R_IEE

#define IMX_SC_R_IEE 239U

◆ IMX_SC_R_IEE_R0

#define IMX_SC_R_IEE_R0 240U

◆ IMX_SC_R_IEE_R1

#define IMX_SC_R_IEE_R1 241U

◆ IMX_SC_R_IEE_R2

#define IMX_SC_R_IEE_R2 242U

◆ IMX_SC_R_IEE_R3

#define IMX_SC_R_IEE_R3 243U

◆ IMX_SC_R_IEE_R4

#define IMX_SC_R_IEE_R4 244U

◆ IMX_SC_R_IEE_R5

#define IMX_SC_R_IEE_R5 245U

◆ IMX_SC_R_IEE_R6

#define IMX_SC_R_IEE_R6 246U

◆ IMX_SC_R_IEE_R7

#define IMX_SC_R_IEE_R7 247U

◆ IMX_SC_R_IRQSTR_DSP

#define IMX_SC_R_IRQSTR_DSP 322U

◆ IMX_SC_R_IRQSTR_M4_0

#define IMX_SC_R_IRQSTR_M4_0 15U

◆ IMX_SC_R_IRQSTR_M4_1

#define IMX_SC_R_IRQSTR_M4_1 16U

◆ IMX_SC_R_IRQSTR_SCU2

#define IMX_SC_R_IRQSTR_SCU2 321U

◆ IMX_SC_R_ISI_CH0

#define IMX_SC_R_ISI_CH0 377U

◆ IMX_SC_R_ISI_CH1

#define IMX_SC_R_ISI_CH1 378U

◆ IMX_SC_R_ISI_CH2

#define IMX_SC_R_ISI_CH2 379U

◆ IMX_SC_R_ISI_CH3

#define IMX_SC_R_ISI_CH3 380U

◆ IMX_SC_R_ISI_CH4

#define IMX_SC_R_ISI_CH4 381U

◆ IMX_SC_R_ISI_CH5

#define IMX_SC_R_ISI_CH5 382U

◆ IMX_SC_R_ISI_CH6

#define IMX_SC_R_ISI_CH6 383U

◆ IMX_SC_R_ISI_CH7

#define IMX_SC_R_ISI_CH7 384U

◆ IMX_SC_R_KPP

#define IMX_SC_R_KPP 212U

◆ IMX_SC_R_LAST

#define IMX_SC_R_LAST 546U

◆ IMX_SC_R_LCD_0

#define IMX_SC_R_LCD_0 187U

◆ IMX_SC_R_LCD_0_I2C_0

#define IMX_SC_R_LCD_0_I2C_0 189U

◆ IMX_SC_R_LCD_0_I2C_1

#define IMX_SC_R_LCD_0_I2C_1 190U

◆ IMX_SC_R_LCD_0_PWM_0

#define IMX_SC_R_LCD_0_PWM_0 188U

◆ IMX_SC_R_LVDS_0

#define IMX_SC_R_LVDS_0 266U

◆ IMX_SC_R_LVDS_0_I2C_0

#define IMX_SC_R_LVDS_0_I2C_0 268U

◆ IMX_SC_R_LVDS_0_I2C_1

#define IMX_SC_R_LVDS_0_I2C_1 269U

◆ IMX_SC_R_LVDS_0_PWM_0

#define IMX_SC_R_LVDS_0_PWM_0 267U

◆ IMX_SC_R_LVDS_1

#define IMX_SC_R_LVDS_1 270U

◆ IMX_SC_R_LVDS_1_I2C_0

#define IMX_SC_R_LVDS_1_I2C_0 272U

◆ IMX_SC_R_LVDS_1_I2C_1

#define IMX_SC_R_LVDS_1_I2C_1 273U

◆ IMX_SC_R_LVDS_1_PWM_0

#define IMX_SC_R_LVDS_1_PWM_0 271U

◆ IMX_SC_R_LVDS_2

#define IMX_SC_R_LVDS_2 274U

◆ IMX_SC_R_LVDS_2_I2C_0

#define IMX_SC_R_LVDS_2_I2C_0 276U

◆ IMX_SC_R_LVDS_2_I2C_1

#define IMX_SC_R_LVDS_2_I2C_1 277U

◆ IMX_SC_R_LVDS_2_PWM_0

#define IMX_SC_R_LVDS_2_PWM_0 275U

◆ IMX_SC_R_M4_0_I2C

#define IMX_SC_R_M4_0_I2C 288U

◆ IMX_SC_R_M4_0_INTMUX

#define IMX_SC_R_M4_0_INTMUX 289U

◆ IMX_SC_R_M4_0_MU_0A0

#define IMX_SC_R_M4_0_MU_0A0 293U

◆ IMX_SC_R_M4_0_MU_0A1

#define IMX_SC_R_M4_0_MU_0A1 294U

◆ IMX_SC_R_M4_0_MU_0A2

#define IMX_SC_R_M4_0_MU_0A2 295U

◆ IMX_SC_R_M4_0_MU_0A3

#define IMX_SC_R_M4_0_MU_0A3 296U

◆ IMX_SC_R_M4_0_MU_0B

#define IMX_SC_R_M4_0_MU_0B 292U

◆ IMX_SC_R_M4_0_MU_1A

#define IMX_SC_R_M4_0_MU_1A 297U

◆ IMX_SC_R_M4_0_PID0

#define IMX_SC_R_M4_0_PID0 278U

◆ IMX_SC_R_M4_0_PID1

#define IMX_SC_R_M4_0_PID1 279U

◆ IMX_SC_R_M4_0_PID2

#define IMX_SC_R_M4_0_PID2 280U

◆ IMX_SC_R_M4_0_PID3

#define IMX_SC_R_M4_0_PID3 281U

◆ IMX_SC_R_M4_0_PID4

#define IMX_SC_R_M4_0_PID4 282U

◆ IMX_SC_R_M4_0_PIT

#define IMX_SC_R_M4_0_PIT 286U

◆ IMX_SC_R_M4_0_RGPIO

#define IMX_SC_R_M4_0_RGPIO 283U

◆ IMX_SC_R_M4_0_SEMA42

#define IMX_SC_R_M4_0_SEMA42 284U

◆ IMX_SC_R_M4_0_TPM

#define IMX_SC_R_M4_0_TPM 285U

◆ IMX_SC_R_M4_0_UART

#define IMX_SC_R_M4_0_UART 287U

◆ IMX_SC_R_M4_1_I2C

#define IMX_SC_R_M4_1_I2C 308U

◆ IMX_SC_R_M4_1_INTMUX

#define IMX_SC_R_M4_1_INTMUX 309U

◆ IMX_SC_R_M4_1_MU_0A0

#define IMX_SC_R_M4_1_MU_0A0 313U

◆ IMX_SC_R_M4_1_MU_0A1

#define IMX_SC_R_M4_1_MU_0A1 314U

◆ IMX_SC_R_M4_1_MU_0A2

#define IMX_SC_R_M4_1_MU_0A2 315U

◆ IMX_SC_R_M4_1_MU_0A3

#define IMX_SC_R_M4_1_MU_0A3 316U

◆ IMX_SC_R_M4_1_MU_0B

#define IMX_SC_R_M4_1_MU_0B 312U

◆ IMX_SC_R_M4_1_MU_1A

#define IMX_SC_R_M4_1_MU_1A 317U

◆ IMX_SC_R_M4_1_PID0

#define IMX_SC_R_M4_1_PID0 298U

◆ IMX_SC_R_M4_1_PID1

#define IMX_SC_R_M4_1_PID1 299U

◆ IMX_SC_R_M4_1_PID2

#define IMX_SC_R_M4_1_PID2 300U

◆ IMX_SC_R_M4_1_PID3

#define IMX_SC_R_M4_1_PID3 301U

◆ IMX_SC_R_M4_1_PID4

#define IMX_SC_R_M4_1_PID4 302U

◆ IMX_SC_R_M4_1_PIT

#define IMX_SC_R_M4_1_PIT 306U

◆ IMX_SC_R_M4_1_RGPIO

#define IMX_SC_R_M4_1_RGPIO 303U

◆ IMX_SC_R_M4_1_SEMA42

#define IMX_SC_R_M4_1_SEMA42 304U

◆ IMX_SC_R_M4_1_TPM

#define IMX_SC_R_M4_1_TPM 305U

◆ IMX_SC_R_M4_1_UART

#define IMX_SC_R_M4_1_UART 307U

◆ IMX_SC_R_MATCH_0

#define IMX_SC_R_MATCH_0 154U

◆ IMX_SC_R_MATCH_1

#define IMX_SC_R_MATCH_1 155U

◆ IMX_SC_R_MATCH_10

#define IMX_SC_R_MATCH_10 164U

◆ IMX_SC_R_MATCH_11

#define IMX_SC_R_MATCH_11 165U

◆ IMX_SC_R_MATCH_12

#define IMX_SC_R_MATCH_12 166U

◆ IMX_SC_R_MATCH_13

#define IMX_SC_R_MATCH_13 167U

◆ IMX_SC_R_MATCH_14

#define IMX_SC_R_MATCH_14 168U

◆ IMX_SC_R_MATCH_15

#define IMX_SC_R_MATCH_15 173U

◆ IMX_SC_R_MATCH_16

#define IMX_SC_R_MATCH_16 174U

◆ IMX_SC_R_MATCH_17

#define IMX_SC_R_MATCH_17 175U

◆ IMX_SC_R_MATCH_18

#define IMX_SC_R_MATCH_18 176U

◆ IMX_SC_R_MATCH_19

#define IMX_SC_R_MATCH_19 177U

◆ IMX_SC_R_MATCH_2

#define IMX_SC_R_MATCH_2 156U

◆ IMX_SC_R_MATCH_20

#define IMX_SC_R_MATCH_20 178U

◆ IMX_SC_R_MATCH_21

#define IMX_SC_R_MATCH_21 179U

◆ IMX_SC_R_MATCH_22

#define IMX_SC_R_MATCH_22 180U

◆ IMX_SC_R_MATCH_23

#define IMX_SC_R_MATCH_23 181U

◆ IMX_SC_R_MATCH_24

#define IMX_SC_R_MATCH_24 182U

◆ IMX_SC_R_MATCH_25

#define IMX_SC_R_MATCH_25 183U

◆ IMX_SC_R_MATCH_26

#define IMX_SC_R_MATCH_26 184U

◆ IMX_SC_R_MATCH_27

#define IMX_SC_R_MATCH_27 185U

◆ IMX_SC_R_MATCH_28

#define IMX_SC_R_MATCH_28 186U

◆ IMX_SC_R_MATCH_3

#define IMX_SC_R_MATCH_3 157U

◆ IMX_SC_R_MATCH_4

#define IMX_SC_R_MATCH_4 158U

◆ IMX_SC_R_MATCH_5

#define IMX_SC_R_MATCH_5 159U

◆ IMX_SC_R_MATCH_6

#define IMX_SC_R_MATCH_6 160U

◆ IMX_SC_R_MATCH_7

#define IMX_SC_R_MATCH_7 161U

◆ IMX_SC_R_MATCH_8

#define IMX_SC_R_MATCH_8 162U

◆ IMX_SC_R_MATCH_9

#define IMX_SC_R_MATCH_9 163U

◆ IMX_SC_R_MCLK_OUT_0

#define IMX_SC_R_MCLK_OUT_0 495U

◆ IMX_SC_R_MCLK_OUT_1

#define IMX_SC_R_MCLK_OUT_1 496U

◆ IMX_SC_R_MIPI_0

#define IMX_SC_R_MIPI_0 393U

◆ IMX_SC_R_MIPI_0_I2C_0

#define IMX_SC_R_MIPI_0_I2C_0 395U

◆ IMX_SC_R_MIPI_0_I2C_1

#define IMX_SC_R_MIPI_0_I2C_1 396U

◆ IMX_SC_R_MIPI_0_PWM_0

#define IMX_SC_R_MIPI_0_PWM_0 394U

◆ IMX_SC_R_MIPI_1

#define IMX_SC_R_MIPI_1 397U

◆ IMX_SC_R_MIPI_1_I2C_0

#define IMX_SC_R_MIPI_1_I2C_0 399U

◆ IMX_SC_R_MIPI_1_I2C_1

#define IMX_SC_R_MIPI_1_I2C_1 400U

◆ IMX_SC_R_MIPI_1_PWM_0

#define IMX_SC_R_MIPI_1_PWM_0 398U

◆ IMX_SC_R_MJPEG_DEC_MP

#define IMX_SC_R_MJPEG_DEC_MP 532U

◆ IMX_SC_R_MJPEG_DEC_S0

#define IMX_SC_R_MJPEG_DEC_S0 385U

◆ IMX_SC_R_MJPEG_DEC_S1

#define IMX_SC_R_MJPEG_DEC_S1 386U

◆ IMX_SC_R_MJPEG_DEC_S2

#define IMX_SC_R_MJPEG_DEC_S2 387U

◆ IMX_SC_R_MJPEG_DEC_S3

#define IMX_SC_R_MJPEG_DEC_S3 388U

◆ IMX_SC_R_MJPEG_ENC_MP

#define IMX_SC_R_MJPEG_ENC_MP 533U

◆ IMX_SC_R_MJPEG_ENC_S0

#define IMX_SC_R_MJPEG_ENC_S0 389U

◆ IMX_SC_R_MJPEG_ENC_S1

#define IMX_SC_R_MJPEG_ENC_S1 390U

◆ IMX_SC_R_MJPEG_ENC_S2

#define IMX_SC_R_MJPEG_ENC_S2 391U

◆ IMX_SC_R_MJPEG_ENC_S3

#define IMX_SC_R_MJPEG_ENC_S3 392U

◆ IMX_SC_R_MLB_0

#define IMX_SC_R_MLB_0 253U

◆ IMX_SC_R_MQS_0

#define IMX_SC_R_MQS_0 459U

◆ IMX_SC_R_MU_0A

#define IMX_SC_R_MU_0A 213U

◆ IMX_SC_R_MU_10A

#define IMX_SC_R_MU_10A 223U

◆ IMX_SC_R_MU_10B

#define IMX_SC_R_MU_10B 232U

◆ IMX_SC_R_MU_11A

#define IMX_SC_R_MU_11A 224U

◆ IMX_SC_R_MU_11B

#define IMX_SC_R_MU_11B 233U

◆ IMX_SC_R_MU_12A

#define IMX_SC_R_MU_12A 225U

◆ IMX_SC_R_MU_12B

#define IMX_SC_R_MU_12B 234U

◆ IMX_SC_R_MU_13A

#define IMX_SC_R_MU_13A 226U

◆ IMX_SC_R_MU_13B

#define IMX_SC_R_MU_13B 235U

◆ IMX_SC_R_MU_1A

#define IMX_SC_R_MU_1A 214U

◆ IMX_SC_R_MU_2A

#define IMX_SC_R_MU_2A 215U

◆ IMX_SC_R_MU_3A

#define IMX_SC_R_MU_3A 216U

◆ IMX_SC_R_MU_4A

#define IMX_SC_R_MU_4A 217U

◆ IMX_SC_R_MU_5A

#define IMX_SC_R_MU_5A 218U

◆ IMX_SC_R_MU_5B

#define IMX_SC_R_MU_5B 227U

◆ IMX_SC_R_MU_6A

#define IMX_SC_R_MU_6A 219U

◆ IMX_SC_R_MU_6B

#define IMX_SC_R_MU_6B 228U

◆ IMX_SC_R_MU_7A

#define IMX_SC_R_MU_7A 220U

◆ IMX_SC_R_MU_7B

#define IMX_SC_R_MU_7B 229U

◆ IMX_SC_R_MU_8A

#define IMX_SC_R_MU_8A 221U

◆ IMX_SC_R_MU_8B

#define IMX_SC_R_MU_8B 230U

◆ IMX_SC_R_MU_9A

#define IMX_SC_R_MU_9A 222U

◆ IMX_SC_R_MU_9B

#define IMX_SC_R_MU_9B 231U

◆ IMX_SC_R_NAND

#define IMX_SC_R_NAND 265U

◆ IMX_SC_R_OCRAM

#define IMX_SC_R_OCRAM 324U

◆ IMX_SC_R_OTP

#define IMX_SC_R_OTP 357U

◆ IMX_SC_R_PCIE_A

#define IMX_SC_R_PCIE_A 152U

◆ IMX_SC_R_PCIE_B

#define IMX_SC_R_PCIE_B 169U

◆ IMX_SC_R_PERF

#define IMX_SC_R_PERF 23U

◆ IMX_SC_R_PI_0

#define IMX_SC_R_PI_0 326U

◆ IMX_SC_R_PI_0_I2C_0

#define IMX_SC_R_PI_0_I2C_0 329U

◆ IMX_SC_R_PI_0_PLL

#define IMX_SC_R_PI_0_PLL 330U

◆ IMX_SC_R_PI_0_PWM_0

#define IMX_SC_R_PI_0_PWM_0 327U

◆ IMX_SC_R_PI_0_PWM_1

#define IMX_SC_R_PI_0_PWM_1 328U

◆ IMX_SC_R_PI_1

#define IMX_SC_R_PI_1 331U

◆ IMX_SC_R_PI_1_I2C_0

#define IMX_SC_R_PI_1_I2C_0 334U

◆ IMX_SC_R_PI_1_PLL

#define IMX_SC_R_PI_1_PLL 335U

◆ IMX_SC_R_PI_1_PWM_0

#define IMX_SC_R_PI_1_PWM_0 332U

◆ IMX_SC_R_PI_1_PWM_1

#define IMX_SC_R_PI_1_PWM_1 333U

◆ IMX_SC_R_PMIC_0

#define IMX_SC_R_PMIC_0 497U

◆ IMX_SC_R_PMIC_1

#define IMX_SC_R_PMIC_1 498U

◆ IMX_SC_R_PMIC_2

#define IMX_SC_R_PMIC_2 521U

◆ IMX_SC_R_PWM_0

#define IMX_SC_R_PWM_0 191U

◆ IMX_SC_R_PWM_1

#define IMX_SC_R_PWM_1 192U

◆ IMX_SC_R_PWM_2

#define IMX_SC_R_PWM_2 193U

◆ IMX_SC_R_PWM_3

#define IMX_SC_R_PWM_3 194U

◆ IMX_SC_R_PWM_4

#define IMX_SC_R_PWM_4 195U

◆ IMX_SC_R_PWM_5

#define IMX_SC_R_PWM_5 196U

◆ IMX_SC_R_PWM_6

#define IMX_SC_R_PWM_6 197U

◆ IMX_SC_R_PWM_7

#define IMX_SC_R_PWM_7 198U

◆ IMX_SC_R_ROM_0

#define IMX_SC_R_ROM_0 236U

◆ IMX_SC_R_SAI_0

#define IMX_SC_R_SAI_0 318U

◆ IMX_SC_R_SAI_1

#define IMX_SC_R_SAI_1 319U

◆ IMX_SC_R_SAI_2

#define IMX_SC_R_SAI_2 320U

◆ IMX_SC_R_SAI_3

#define IMX_SC_R_SAI_3 418U

◆ IMX_SC_R_SAI_4

#define IMX_SC_R_SAI_4 419U

◆ IMX_SC_R_SAI_5

#define IMX_SC_R_SAI_5 420U

◆ IMX_SC_R_SAI_6

#define IMX_SC_R_SAI_6 456U

◆ IMX_SC_R_SAI_7

#define IMX_SC_R_SAI_7 457U

◆ IMX_SC_R_SATA_0

#define IMX_SC_R_SATA_0 170U

◆ IMX_SC_R_SC_I2C

#define IMX_SC_R_SC_I2C 345U

◆ IMX_SC_R_SC_MU_0A0

#define IMX_SC_R_SC_MU_0A0 347U

◆ IMX_SC_R_SC_MU_0A1

#define IMX_SC_R_SC_MU_0A1 348U

◆ IMX_SC_R_SC_MU_0A2

#define IMX_SC_R_SC_MU_0A2 349U

◆ IMX_SC_R_SC_MU_0A3

#define IMX_SC_R_SC_MU_0A3 350U

◆ IMX_SC_R_SC_MU_0B

#define IMX_SC_R_SC_MU_0B 346U

◆ IMX_SC_R_SC_MU_1A

#define IMX_SC_R_SC_MU_1A 351U

◆ IMX_SC_R_SC_PID0

#define IMX_SC_R_SC_PID0 336U

◆ IMX_SC_R_SC_PID1

#define IMX_SC_R_SC_PID1 337U

◆ IMX_SC_R_SC_PID2

#define IMX_SC_R_SC_PID2 338U

◆ IMX_SC_R_SC_PID3

#define IMX_SC_R_SC_PID3 339U

◆ IMX_SC_R_SC_PID4

#define IMX_SC_R_SC_PID4 340U

◆ IMX_SC_R_SC_PIT

#define IMX_SC_R_SC_PIT 343U

◆ IMX_SC_R_SC_SEMA42

#define IMX_SC_R_SC_SEMA42 341U

◆ IMX_SC_R_SC_TPM

#define IMX_SC_R_SC_TPM 342U

◆ IMX_SC_R_SC_UART

#define IMX_SC_R_SC_UART 344U

◆ IMX_SC_R_SDHC_0

#define IMX_SC_R_SDHC_0 248U

◆ IMX_SC_R_SDHC_1

#define IMX_SC_R_SDHC_1 249U

◆ IMX_SC_R_SDHC_2

#define IMX_SC_R_SDHC_2 250U

◆ IMX_SC_R_SECO

#define IMX_SC_R_SECO 499U

◆ IMX_SC_R_SECO_MU_2

#define IMX_SC_R_SECO_MU_2 503U

◆ IMX_SC_R_SECO_MU_3

#define IMX_SC_R_SECO_MU_3 504U

◆ IMX_SC_R_SECO_MU_4

#define IMX_SC_R_SECO_MU_4 505U

◆ IMX_SC_R_SECVIO

#define IMX_SC_R_SECVIO 44U

◆ IMX_SC_R_SERDES_0

#define IMX_SC_R_SERDES_0 153U

◆ IMX_SC_R_SERDES_1

#define IMX_SC_R_SERDES_1 171U

◆ IMX_SC_R_SMMU

#define IMX_SC_R_SMMU 17U

◆ IMX_SC_R_SNVS

#define IMX_SC_R_SNVS 356U

◆ IMX_SC_R_SPDIF_0

#define IMX_SC_R_SPDIF_0 416U

◆ IMX_SC_R_SPDIF_1

#define IMX_SC_R_SPDIF_1 417U

◆ IMX_SC_R_SPI_0

#define IMX_SC_R_SPI_0 53U

◆ IMX_SC_R_SPI_1

#define IMX_SC_R_SPI_1 54U

◆ IMX_SC_R_SPI_2

#define IMX_SC_R_SPI_2 55U

◆ IMX_SC_R_SPI_3

#define IMX_SC_R_SPI_3 56U

◆ IMX_SC_R_SYSCNT_CMP

#define IMX_SC_R_SYSCNT_CMP 353U

◆ IMX_SC_R_SYSCNT_RD

#define IMX_SC_R_SYSCNT_RD 352U

◆ IMX_SC_R_SYSTEM

#define IMX_SC_R_SYSTEM 355U

◆ IMX_SC_R_UART_0

#define IMX_SC_R_UART_0 57U

◆ IMX_SC_R_UART_1

#define IMX_SC_R_UART_1 58U

◆ IMX_SC_R_UART_2

#define IMX_SC_R_UART_2 59U

◆ IMX_SC_R_UART_3

#define IMX_SC_R_UART_3 60U

◆ IMX_SC_R_UART_4

#define IMX_SC_R_UART_4 61U

◆ IMX_SC_R_UNUSED1

#define IMX_SC_R_UNUSED1 43U

◆ IMX_SC_R_UNUSED13

#define IMX_SC_R_UNUSED13 48U

◆ IMX_SC_R_UNUSED14

#define IMX_SC_R_UNUSED14 50U

◆ IMX_SC_R_UNUSED17

#define IMX_SC_R_UNUSED17 310U

◆ IMX_SC_R_UNUSED18

#define IMX_SC_R_UNUSED18 311U

◆ IMX_SC_R_USB_0

#define IMX_SC_R_USB_0 259U

◆ IMX_SC_R_USB_0_PHY

#define IMX_SC_R_USB_0_PHY 261U

◆ IMX_SC_R_USB_1

#define IMX_SC_R_USB_1 260U

◆ IMX_SC_R_USB_1_PHY

#define IMX_SC_R_USB_1_PHY 24U

◆ IMX_SC_R_USB_2

#define IMX_SC_R_USB_2 262U

◆ IMX_SC_R_USB_2_PHY

#define IMX_SC_R_USB_2_PHY 263U

◆ IMX_SC_R_V2X_MU_0

#define IMX_SC_R_V2X_MU_0 26U

◆ IMX_SC_R_V2X_MU_1

#define IMX_SC_R_V2X_MU_1 27U

◆ IMX_SC_R_V2X_MU_2

#define IMX_SC_R_V2X_MU_2 31U

◆ IMX_SC_R_V2X_MU_3

#define IMX_SC_R_V2X_MU_3 40U

◆ IMX_SC_R_V2X_MU_4

#define IMX_SC_R_V2X_MU_4 41U

◆ IMX_SC_R_V2X_PID0

#define IMX_SC_R_V2X_PID0 140U

◆ IMX_SC_R_V2X_PID1

#define IMX_SC_R_V2X_PID1 141U

◆ IMX_SC_R_V2X_PID2

#define IMX_SC_R_V2X_PID2 142U

◆ IMX_SC_R_V2X_PID3

#define IMX_SC_R_V2X_PID3 143U

◆ IMX_SC_R_VPU

#define IMX_SC_R_VPU 540U

◆ IMX_SC_R_VPU_DEC_0

#define IMX_SC_R_VPU_DEC_0 517U

◆ IMX_SC_R_VPU_ENC_0

#define IMX_SC_R_VPU_ENC_0 518U

◆ IMX_SC_R_VPU_ENC_1

#define IMX_SC_R_VPU_ENC_1 539U

◆ IMX_SC_R_VPU_MU_0

#define IMX_SC_R_VPU_MU_0 535U

◆ IMX_SC_R_VPU_MU_1

#define IMX_SC_R_VPU_MU_1 536U

◆ IMX_SC_R_VPU_MU_2

#define IMX_SC_R_VPU_MU_2 537U

◆ IMX_SC_R_VPU_MU_3

#define IMX_SC_R_VPU_MU_3 538U

◆ IMX_SC_R_VPU_PID0

#define IMX_SC_R_VPU_PID0 358U

◆ IMX_SC_R_VPU_PID1

#define IMX_SC_R_VPU_PID1 359U

◆ IMX_SC_R_VPU_PID2

#define IMX_SC_R_VPU_PID2 360U

◆ IMX_SC_R_VPU_PID3

#define IMX_SC_R_VPU_PID3 361U

◆ IMX_SC_R_VPU_PID4

#define IMX_SC_R_VPU_PID4 362U

◆ IMX_SC_R_VPU_PID5

#define IMX_SC_R_VPU_PID5 363U

◆ IMX_SC_R_VPU_PID6

#define IMX_SC_R_VPU_PID6 364U

◆ IMX_SC_R_VPU_PID7

#define IMX_SC_R_VPU_PID7 365U

◆ IMX_SC_R_VPU_TS_0

#define IMX_SC_R_VPU_TS_0 534U

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