Macros
#define	MAX32_DMA_SLOT_MEMTOMEM 0x00U

#define	MAX32_DMA_SLOT_SPI0_RX 0x01U

#define	MAX32_DMA_SLOT_SPI1_RX 0x02U

#define	MAX32_DMA_SLOT_UART0_RX 0x04U

#define	MAX32_DMA_SLOT_UART1_RX 0x05U

#define	MAX32_DMA_SLOT_CAN_RX 0x06U

#define	MAX32_DMA_SLOT_I2C0_RX 0x07U

#define	MAX32_DMA_SLOT_I2C1_RX 0x08U

#define	MAX32_DMA_SLOT_ADC 0x09U

#define	MAX32_DMA_SLOT_I2S_RX 0x1EU

#define	MAX32_DMA_SLOT_SPI0_TX 0x21U

#define	MAX32_DMA_SLOT_SPI1_TX 0x22U

#define	MAX32_DMA_SLOT_UART0_TX 0x24U

#define	MAX32_DMA_SLOT_UART1_TX 0x25U

#define	MAX32_DMA_SLOT_CAN_TX 0x26U

#define	MAX32_DMA_SLOT_I2C0_TX 0x27U

#define	MAX32_DMA_SLOT_I2C1_TX 0x28U

#define	MAX32_DMA_SLOT_I2S_TX 0x3EU

Macro Definition Documentation

◆ MAX32_DMA_SLOT_ADC

#define MAX32_DMA_SLOT_ADC 0x09U

◆ MAX32_DMA_SLOT_CAN_RX

#define MAX32_DMA_SLOT_CAN_RX 0x06U

◆ MAX32_DMA_SLOT_CAN_TX

#define MAX32_DMA_SLOT_CAN_TX 0x26U

◆ MAX32_DMA_SLOT_I2C0_RX

#define MAX32_DMA_SLOT_I2C0_RX 0x07U

◆ MAX32_DMA_SLOT_I2C0_TX

#define MAX32_DMA_SLOT_I2C0_TX 0x27U

◆ MAX32_DMA_SLOT_I2C1_RX

#define MAX32_DMA_SLOT_I2C1_RX 0x08U

◆ MAX32_DMA_SLOT_I2C1_TX

#define MAX32_DMA_SLOT_I2C1_TX 0x28U

◆ MAX32_DMA_SLOT_I2S_RX

#define MAX32_DMA_SLOT_I2S_RX 0x1EU

◆ MAX32_DMA_SLOT_I2S_TX

#define MAX32_DMA_SLOT_I2S_TX 0x3EU

◆ MAX32_DMA_SLOT_MEMTOMEM

#define MAX32_DMA_SLOT_MEMTOMEM 0x00U

◆ MAX32_DMA_SLOT_SPI0_RX

#define MAX32_DMA_SLOT_SPI0_RX 0x01U

◆ MAX32_DMA_SLOT_SPI0_TX

#define MAX32_DMA_SLOT_SPI0_TX 0x21U

◆ MAX32_DMA_SLOT_SPI1_RX

#define MAX32_DMA_SLOT_SPI1_RX 0x02U

◆ MAX32_DMA_SLOT_SPI1_TX

#define MAX32_DMA_SLOT_SPI1_TX 0x22U

◆ MAX32_DMA_SLOT_UART0_RX

#define MAX32_DMA_SLOT_UART0_RX 0x04U

◆ MAX32_DMA_SLOT_UART0_TX

#define MAX32_DMA_SLOT_UART0_TX 0x24U

◆ MAX32_DMA_SLOT_UART1_RX

#define MAX32_DMA_SLOT_UART1_RX 0x05U

◆ MAX32_DMA_SLOT_UART1_TX

#define MAX32_DMA_SLOT_UART1_TX 0x25U

Macros