Zephyr API Documentation 4.0.0
A Scalable Open Source RTOS
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max32675_dma.h
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1/*
2 * Copyright (c) 2024 Analog Devices, Inc.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_DMA_MAX32675_DMA_H_
8#define ZEPHYR_INCLUDE_DT_BINDINGS_DMA_MAX32675_DMA_H_
9
10#define MAX32_DMA_SLOT_MEMTOMEM 0x00U
11#define MAX32_DMA_SLOT_SPI0_RX 0x01U
12#define MAX32_DMA_SLOT_SPI1_RX 0x02U
13#define MAX32_DMA_SLOT_UART0_RX 0x04U
14#define MAX32_DMA_SLOT_I2C0_RX 0x07U
15#define MAX32_DMA_SLOT_I2C2_RX 0x0AU
16#define MAX32_DMA_SLOT_UART2_RX 0x0EU
17#define MAX32_DMA_SLOT_AES_RX 0x10U
18#define MAX32_DMA_SLOT_I2S_RX 0x1EU
19#define MAX32_DMA_SLOT_SPI0_TX 0x21U
20#define MAX32_DMA_SLOT_SPI1_TX 0x22U
21#define MAX32_DMA_SLOT_UART0_TX 0x24U
22#define MAX32_DMA_SLOT_I2C0_TX 0x27U
23#define MAX32_DMA_SLOT_I2C2_TX 0x2AU
24#define MAX32_DMA_SLOT_CRC 0x2CU
25#define MAX32_DMA_SLOT_UART2_TX 0x2EU
26#define MAX32_DMA_SLOT_AES_TX 0x30U
27#define MAX32_DMA_SLOT_I2S_TX 0x3EU
28
29#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_DMA_MAX32675_DMA_H_ */