Zephyr API Documentation 4.0.0-rc3
A Scalable Open Source RTOS
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RISC-V public interrupt handling. More...
#include <zephyr/sys/util_macro.h>
#include <zephyr/irq.h>
#include <zephyr/sw_isr_table.h>
#include <stdbool.h>
Go to the source code of this file.
Macros | |
#define | RISCV_EXC_ECALLU 8 |
#define | RISCV_EXC_ECALLM 11 |
Environment Call from M-mode. | |
#define | RISCV_IRQ_MSOFT 3 |
Machine Software Interrupt. | |
#define | RISCV_IRQ_MEXT 11 |
Machine External Interrupt. | |
#define | RISCV_MCAUSE_IRQ_POS 31U |
#define | RISCV_MCAUSE_IRQ_BIT BIT(RISCV_MCAUSE_IRQ_POS) |
#define | ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) |
#define | ARCH_IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p) |
#define | ARCH_ISR_DIRECT_HEADER() |
#define | ARCH_ISR_DIRECT_FOOTER(swap) |
#define | ARCH_ISR_DIRECT_DECLARE(name) |
Functions | |
void | arch_irq_enable (unsigned int irq) |
void | arch_irq_disable (unsigned int irq) |
int | arch_irq_is_enabled (unsigned int irq) |
static void | arch_isr_direct_header (void) |
static void | arch_isr_direct_footer (int swap) |
RISC-V public interrupt handling.
RISC-V-specific kernel interrupt handling interface.
#define ARCH_IRQ_CONNECT | ( | irq_p, | |
priority_p, | |||
isr_p, | |||
isr_param_p, | |||
flags_p ) |
#define ARCH_IRQ_DIRECT_CONNECT | ( | irq_p, | |
priority_p, | |||
isr_p, | |||
flags_p ) |
#define ARCH_ISR_DIRECT_DECLARE | ( | name | ) |
#define ARCH_ISR_DIRECT_FOOTER | ( | swap | ) |
#define ARCH_ISR_DIRECT_HEADER | ( | ) |
#define RISCV_EXC_ECALLM 11 |
Environment Call from M-mode.
#define RISCV_EXC_ECALLU 8 |
#define RISCV_IRQ_MEXT 11 |
Machine External Interrupt.
#define RISCV_IRQ_MSOFT 3 |
Machine Software Interrupt.
#define RISCV_MCAUSE_IRQ_BIT BIT(RISCV_MCAUSE_IRQ_POS) |
#define RISCV_MCAUSE_IRQ_POS 31U |
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