Zephyr API Documentation  3.7.0-rc3
A Scalable Open Source RTOS
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gpio.h
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1/*
2 * Copyright (c) 2019-2020 Nordic Semiconductor ASA
3 * Copyright (c) 2019 Piotr Mienkowski
4 * Copyright (c) 2017 ARM Ltd
5 * Copyright (c) 2015-2016 Intel Corporation.
6 *
7 * SPDX-License-Identifier: Apache-2.0
8 */
9
15#ifndef ZEPHYR_INCLUDE_DRIVERS_GPIO_H_
16#define ZEPHYR_INCLUDE_DRIVERS_GPIO_H_
17
18#include <errno.h>
19
20#include <zephyr/sys/__assert.h>
21#include <zephyr/sys/slist.h>
22
23#include <zephyr/types.h>
24#include <stddef.h>
25#include <zephyr/device.h>
27
28#ifdef __cplusplus
29extern "C" {
30#endif
31
47#define GPIO_INPUT (1U << 16)
48
50#define GPIO_OUTPUT (1U << 17)
51
53#define GPIO_DISCONNECTED 0
54
57/* Initializes output to a low state. */
58#define GPIO_OUTPUT_INIT_LOW (1U << 18)
59
60/* Initializes output to a high state. */
61#define GPIO_OUTPUT_INIT_HIGH (1U << 19)
62
63/* Initializes output based on logic level */
64#define GPIO_OUTPUT_INIT_LOGICAL (1U << 20)
65
69#define GPIO_OUTPUT_LOW (GPIO_OUTPUT | GPIO_OUTPUT_INIT_LOW)
71#define GPIO_OUTPUT_HIGH (GPIO_OUTPUT | GPIO_OUTPUT_INIT_HIGH)
73#define GPIO_OUTPUT_INACTIVE (GPIO_OUTPUT | \
74 GPIO_OUTPUT_INIT_LOW | \
75 GPIO_OUTPUT_INIT_LOGICAL)
77#define GPIO_OUTPUT_ACTIVE (GPIO_OUTPUT | \
78 GPIO_OUTPUT_INIT_HIGH | \
79 GPIO_OUTPUT_INIT_LOGICAL)
80
100#define GPIO_INT_DISABLE (1U << 21)
101
104/* Enables GPIO pin interrupt. */
105#define GPIO_INT_ENABLE (1U << 22)
106
107/* GPIO interrupt is sensitive to logical levels.
108 *
109 * This is a component flag that should be combined with other
110 * `GPIO_INT_*` flags to produce a meaningful configuration.
111 */
112#define GPIO_INT_LEVELS_LOGICAL (1U << 23)
113
114/* GPIO interrupt is edge sensitive.
115 *
116 * Note: by default interrupts are level sensitive.
117 *
118 * This is a component flag that should be combined with other
119 * `GPIO_INT_*` flags to produce a meaningful configuration.
120 */
121#define GPIO_INT_EDGE (1U << 24)
122
123/* Trigger detection when input state is (or transitions to) physical low or
124 * logical 0 level.
125 *
126 * This is a component flag that should be combined with other
127 * `GPIO_INT_*` flags to produce a meaningful configuration.
128 */
129#define GPIO_INT_LOW_0 (1U << 25)
130
131/* Trigger detection on input state is (or transitions to) physical high or
132 * logical 1 level.
133 *
134 * This is a component flag that should be combined with other
135 * `GPIO_INT_*` flags to produce a meaningful configuration.
136 */
137#define GPIO_INT_HIGH_1 (1U << 26)
138
139#ifdef CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT
140/* Disable/Enable interrupt functionality without changing other interrupt
141 * related register, such as clearing the pending register.
142 *
143 * This is a component flag that should be combined with `GPIO_INT_ENABLE` or
144 * `GPIO_INT_DISABLE` flags to produce a meaningful configuration.
145 */
146#define GPIO_INT_ENABLE_DISABLE_ONLY (1u << 27)
147#endif /* CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT */
148
149#define GPIO_INT_MASK (GPIO_INT_DISABLE | \
150 GPIO_INT_ENABLE | \
151 GPIO_INT_LEVELS_LOGICAL | \
152 GPIO_INT_EDGE | \
153 GPIO_INT_LOW_0 | \
154 GPIO_INT_HIGH_1)
155
160#define GPIO_INT_EDGE_RISING (GPIO_INT_ENABLE | \
161 GPIO_INT_EDGE | \
162 GPIO_INT_HIGH_1)
163
167#define GPIO_INT_EDGE_FALLING (GPIO_INT_ENABLE | \
168 GPIO_INT_EDGE | \
169 GPIO_INT_LOW_0)
170
174#define GPIO_INT_EDGE_BOTH (GPIO_INT_ENABLE | \
175 GPIO_INT_EDGE | \
176 GPIO_INT_LOW_0 | \
177 GPIO_INT_HIGH_1)
178
182#define GPIO_INT_LEVEL_LOW (GPIO_INT_ENABLE | \
183 GPIO_INT_LOW_0)
184
188#define GPIO_INT_LEVEL_HIGH (GPIO_INT_ENABLE | \
189 GPIO_INT_HIGH_1)
190
194#define GPIO_INT_EDGE_TO_INACTIVE (GPIO_INT_ENABLE | \
195 GPIO_INT_LEVELS_LOGICAL | \
196 GPIO_INT_EDGE | \
197 GPIO_INT_LOW_0)
198
202#define GPIO_INT_EDGE_TO_ACTIVE (GPIO_INT_ENABLE | \
203 GPIO_INT_LEVELS_LOGICAL | \
204 GPIO_INT_EDGE | \
205 GPIO_INT_HIGH_1)
206
210#define GPIO_INT_LEVEL_INACTIVE (GPIO_INT_ENABLE | \
211 GPIO_INT_LEVELS_LOGICAL | \
212 GPIO_INT_LOW_0)
213
217#define GPIO_INT_LEVEL_ACTIVE (GPIO_INT_ENABLE | \
218 GPIO_INT_LEVELS_LOGICAL | \
219 GPIO_INT_HIGH_1)
220
224#define GPIO_DIR_MASK (GPIO_INPUT | GPIO_OUTPUT)
234
247
255
267
275
290 const struct device *port;
295};
296
331#define GPIO_DT_SPEC_GET_BY_IDX(node_id, prop, idx) \
332 { \
333 .port = DEVICE_DT_GET(DT_GPIO_CTLR_BY_IDX(node_id, prop, idx)),\
334 .pin = DT_GPIO_PIN_BY_IDX(node_id, prop, idx), \
335 .dt_flags = DT_GPIO_FLAGS_BY_IDX(node_id, prop, idx), \
336 }
337
355#define GPIO_DT_SPEC_GET_BY_IDX_OR(node_id, prop, idx, default_value) \
356 COND_CODE_1(DT_NODE_HAS_PROP(node_id, prop), \
357 (GPIO_DT_SPEC_GET_BY_IDX(node_id, prop, idx)), \
358 (default_value))
359
368#define GPIO_DT_SPEC_GET(node_id, prop) \
369 GPIO_DT_SPEC_GET_BY_IDX(node_id, prop, 0)
370
381#define GPIO_DT_SPEC_GET_OR(node_id, prop, default_value) \
382 GPIO_DT_SPEC_GET_BY_IDX_OR(node_id, prop, 0, default_value)
383
394#define GPIO_DT_SPEC_INST_GET_BY_IDX(inst, prop, idx) \
395 GPIO_DT_SPEC_GET_BY_IDX(DT_DRV_INST(inst), prop, idx)
396
408#define GPIO_DT_SPEC_INST_GET_BY_IDX_OR(inst, prop, idx, default_value) \
409 COND_CODE_1(DT_PROP_HAS_IDX(DT_DRV_INST(inst), prop, idx), \
410 (GPIO_DT_SPEC_GET_BY_IDX(DT_DRV_INST(inst), prop, idx)), \
411 (default_value))
412
421#define GPIO_DT_SPEC_INST_GET(inst, prop) \
422 GPIO_DT_SPEC_INST_GET_BY_IDX(inst, prop, 0)
423
434#define GPIO_DT_SPEC_INST_GET_OR(inst, prop, default_value) \
435 GPIO_DT_SPEC_INST_GET_BY_IDX_OR(inst, prop, 0, default_value)
436
437/*
438 * @cond INTERNAL_HIDDEN
439 */
440
451#define Z_GPIO_GEN_BITMASK_COND(node_id, prop, off_idx, sz_idx) \
452 COND_CODE_1(DT_PROP_HAS_IDX(node_id, prop, off_idx), \
453 (COND_CODE_0(DT_PROP_BY_IDX(node_id, prop, sz_idx), \
454 (0), \
455 (GENMASK64(DT_PROP_BY_IDX(node_id, prop, off_idx) + \
456 DT_PROP_BY_IDX(node_id, prop, sz_idx) - 1, \
457 DT_PROP_BY_IDX(node_id, prop, off_idx)))) \
458 ), (0))
459
467#define Z_GPIO_GEN_RESERVED_RANGES_COND(odd_it, node_id) \
468 COND_CODE_1(DT_PROP_HAS_IDX(node_id, gpio_reserved_ranges, odd_it), \
469 (Z_GPIO_GEN_BITMASK_COND(node_id, \
470 gpio_reserved_ranges, \
471 GET_ARG_N(odd_it, Z_SPARSE_LIST_EVEN_NUMBERS), \
472 odd_it)), \
473 (0))
474
566#define GPIO_DT_RESERVED_RANGES_NGPIOS(node_id, ngpios) \
567 ((gpio_port_pins_t) \
568 COND_CODE_1(DT_NODE_HAS_PROP(node_id, gpio_reserved_ranges), \
569 (GENMASK64(BITS_PER_LONG_LONG - 1, ngpios) \
570 | FOR_EACH_FIXED_ARG(Z_GPIO_GEN_RESERVED_RANGES_COND, \
571 (|), \
572 node_id, \
573 LIST_DROP_EMPTY(Z_SPARSE_LIST_ODD_NUMBERS))), \
574 (0)))
575
583#define GPIO_DT_RESERVED_RANGES(node_id) \
584 GPIO_DT_RESERVED_RANGES_NGPIOS(node_id, DT_PROP(node_id, ngpios))
585
595#define GPIO_DT_INST_RESERVED_RANGES_NGPIOS(inst, ngpios) \
596 GPIO_DT_RESERVED_RANGES_NGPIOS(DT_DRV_INST(inst), ngpios)
597
606#define GPIO_DT_INST_RESERVED_RANGES(inst) \
607 GPIO_DT_RESERVED_RANGES(DT_DRV_INST(inst))
608
657#define GPIO_DT_PORT_PIN_MASK_NGPIOS_EXC(node_id, ngpios) \
658 ((gpio_port_pins_t) \
659 COND_CODE_0(ngpios, \
660 (0), \
661 (COND_CODE_1(DT_NODE_HAS_PROP(node_id, gpio_reserved_ranges), \
662 ((GENMASK64(ngpios - 1, 0) & \
663 ~GPIO_DT_RESERVED_RANGES_NGPIOS(node_id, ngpios))), \
664 (GENMASK64(ngpios - 1, 0))) \
665 ) \
666 ))
667
677#define GPIO_DT_INST_PORT_PIN_MASK_NGPIOS_EXC(inst, ngpios) \
678 GPIO_DT_PORT_PIN_MASK_NGPIOS_EXC(DT_DRV_INST(inst), ngpios)
679
683#define GPIO_MAX_PINS_PER_PORT (sizeof(gpio_port_pins_t) * __CHAR_BIT__)
684
697};
698
710};
711
712struct gpio_callback;
713
726typedef void (*gpio_callback_handler_t)(const struct device *port,
727 struct gpio_callback *cb,
728 gpio_port_pins_t pins);
729
745
748
756};
757
764/* Used by driver api function pin_interrupt_configure, these are defined
765 * in terms of the public flags so we can just mask and pass them
766 * through to the driver api
767 */
768enum gpio_int_mode {
769 GPIO_INT_MODE_DISABLED = GPIO_INT_DISABLE,
770 GPIO_INT_MODE_LEVEL = GPIO_INT_ENABLE,
771 GPIO_INT_MODE_EDGE = GPIO_INT_ENABLE | GPIO_INT_EDGE,
772#ifdef CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT
773 GPIO_INT_MODE_DISABLE_ONLY = GPIO_INT_DISABLE | GPIO_INT_ENABLE_DISABLE_ONLY,
774 GPIO_INT_MODE_ENABLE_ONLY = GPIO_INT_ENABLE | GPIO_INT_ENABLE_DISABLE_ONLY,
775#endif /* CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT */
776};
777
778enum gpio_int_trig {
779 /* Trigger detection when input state is (or transitions to)
780 * physical low. (Edge Falling or Active Low)
781 */
782 GPIO_INT_TRIG_LOW = GPIO_INT_LOW_0,
783 /* Trigger detection when input state is (or transitions to)
784 * physical high. (Edge Rising or Active High) */
785 GPIO_INT_TRIG_HIGH = GPIO_INT_HIGH_1,
786 /* Trigger detection on pin rising or falling edge. */
787 GPIO_INT_TRIG_BOTH = GPIO_INT_LOW_0 | GPIO_INT_HIGH_1,
788 /* Trigger a system wakeup. */
789 GPIO_INT_TRIG_WAKE = GPIO_INT_WAKEUP,
790};
791
792__subsystem struct gpio_driver_api {
793 int (*pin_configure)(const struct device *port, gpio_pin_t pin,
795#ifdef CONFIG_GPIO_GET_CONFIG
796 int (*pin_get_config)(const struct device *port, gpio_pin_t pin,
798#endif
799 int (*port_get_raw)(const struct device *port,
800 gpio_port_value_t *value);
801 int (*port_set_masked_raw)(const struct device *port,
802 gpio_port_pins_t mask,
803 gpio_port_value_t value);
804 int (*port_set_bits_raw)(const struct device *port,
805 gpio_port_pins_t pins);
806 int (*port_clear_bits_raw)(const struct device *port,
807 gpio_port_pins_t pins);
808 int (*port_toggle_bits)(const struct device *port,
809 gpio_port_pins_t pins);
810 int (*pin_interrupt_configure)(const struct device *port,
811 gpio_pin_t pin,
812 enum gpio_int_mode, enum gpio_int_trig);
813 int (*manage_callback)(const struct device *port,
814 struct gpio_callback *cb,
815 bool set);
816 uint32_t (*get_pending_int)(const struct device *dev);
817#ifdef CONFIG_GPIO_GET_DIRECTION
818 int (*port_get_direction)(const struct device *port, gpio_port_pins_t map,
819 gpio_port_pins_t *inputs, gpio_port_pins_t *outputs);
820#endif /* CONFIG_GPIO_GET_DIRECTION */
821};
822
835static inline bool gpio_is_ready_dt(const struct gpio_dt_spec *spec)
836{
837 /* Validate port is ready */
838 return device_is_ready(spec->port);
839}
840
862__syscall int gpio_pin_interrupt_configure(const struct device *port,
863 gpio_pin_t pin,
865
866static inline int z_impl_gpio_pin_interrupt_configure(const struct device *port,
867 gpio_pin_t pin,
869{
870 const struct gpio_driver_api *api =
871 (const struct gpio_driver_api *)port->api;
872 __unused const struct gpio_driver_config *const cfg =
873 (const struct gpio_driver_config *)port->config;
874 const struct gpio_driver_data *const data =
875 (const struct gpio_driver_data *)port->data;
876 enum gpio_int_trig trig;
877 enum gpio_int_mode mode;
878
879 if (api->pin_interrupt_configure == NULL) {
880 return -ENOSYS;
881 }
882
883 __ASSERT((flags & (GPIO_INT_DISABLE | GPIO_INT_ENABLE))
884 != (GPIO_INT_DISABLE | GPIO_INT_ENABLE),
885 "Cannot both enable and disable interrupts");
886
887 __ASSERT((flags & (GPIO_INT_DISABLE | GPIO_INT_ENABLE)) != 0U,
888 "Must either enable or disable interrupts");
889
890 __ASSERT(((flags & GPIO_INT_ENABLE) == 0) ||
891 ((flags & GPIO_INT_EDGE) != 0) ||
892 ((flags & (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1)) !=
893 (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1)),
894 "Only one of GPIO_INT_LOW_0, GPIO_INT_HIGH_1 can be "
895 "enabled for a level interrupt.");
896
897 __ASSERT(((flags & GPIO_INT_ENABLE) == 0) ||
898#ifdef CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT
899 ((flags & (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1)) != 0) ||
900 (flags & GPIO_INT_ENABLE_DISABLE_ONLY) != 0,
901#else
902 ((flags & (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1)) != 0),
903#endif /* CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT */
904 "At least one of GPIO_INT_LOW_0, GPIO_INT_HIGH_1 has to be "
905 "enabled.");
906
907 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
908 "Unsupported pin");
909
910 if (((flags & GPIO_INT_LEVELS_LOGICAL) != 0) &&
911 ((data->invert & (gpio_port_pins_t)BIT(pin)) != 0)) {
912 /* Invert signal bits */
913 flags ^= (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1);
914 }
915
916 trig = (enum gpio_int_trig)(flags & (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1 | GPIO_INT_WAKEUP));
917#ifdef CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT
918 mode = (enum gpio_int_mode)(flags & (GPIO_INT_EDGE | GPIO_INT_DISABLE | GPIO_INT_ENABLE |
919 GPIO_INT_ENABLE_DISABLE_ONLY));
920#else
921 mode = (enum gpio_int_mode)(flags & (GPIO_INT_EDGE | GPIO_INT_DISABLE | GPIO_INT_ENABLE));
922#endif /* CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT */
923
924 return api->pin_interrupt_configure(port, pin, mode, trig);
925}
926
940static inline int gpio_pin_interrupt_configure_dt(const struct gpio_dt_spec *spec,
942{
943 return gpio_pin_interrupt_configure(spec->port, spec->pin, flags);
944}
945
961__syscall int gpio_pin_configure(const struct device *port,
962 gpio_pin_t pin,
964
965static inline int z_impl_gpio_pin_configure(const struct device *port,
966 gpio_pin_t pin,
968{
969 const struct gpio_driver_api *api =
970 (const struct gpio_driver_api *)port->api;
971 __unused const struct gpio_driver_config *const cfg =
972 (const struct gpio_driver_config *)port->config;
973 struct gpio_driver_data *data =
974 (struct gpio_driver_data *)port->data;
975
976 __ASSERT((flags & GPIO_INT_MASK) == 0,
977 "Interrupt flags are not supported");
978
979 __ASSERT((flags & (GPIO_PULL_UP | GPIO_PULL_DOWN)) !=
981 "Pull Up and Pull Down should not be enabled simultaneously");
982
983 __ASSERT(!((flags & GPIO_INPUT) && !(flags & GPIO_OUTPUT) && (flags & GPIO_SINGLE_ENDED)),
984 "Input cannot be enabled for 'Open Drain', 'Open Source' modes without Output");
985
986 __ASSERT_NO_MSG((flags & GPIO_SINGLE_ENDED) != 0 ||
987 (flags & GPIO_LINE_OPEN_DRAIN) == 0);
988
989 __ASSERT((flags & (GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH)) == 0
990 || (flags & GPIO_OUTPUT) != 0,
991 "Output needs to be enabled to be initialized low or high");
992
993 __ASSERT((flags & (GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH))
994 != (GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH),
995 "Output cannot be initialized low and high");
996
997 if (((flags & GPIO_OUTPUT_INIT_LOGICAL) != 0)
998 && ((flags & (GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH)) != 0)
999 && ((flags & GPIO_ACTIVE_LOW) != 0)) {
1000 flags ^= GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH;
1001 }
1002
1003 flags &= ~GPIO_OUTPUT_INIT_LOGICAL;
1004
1005 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
1006 "Unsupported pin");
1007
1008 if ((flags & GPIO_ACTIVE_LOW) != 0) {
1009 data->invert |= (gpio_port_pins_t)BIT(pin);
1010 } else {
1011 data->invert &= ~(gpio_port_pins_t)BIT(pin);
1012 }
1013
1014 return api->pin_configure(port, pin, flags);
1015}
1016
1028static inline int gpio_pin_configure_dt(const struct gpio_dt_spec *spec,
1029 gpio_flags_t extra_flags)
1030{
1031 return gpio_pin_configure(spec->port,
1032 spec->pin,
1033 spec->dt_flags | extra_flags);
1034}
1035
1054__syscall int gpio_port_get_direction(const struct device *port, gpio_port_pins_t map,
1055 gpio_port_pins_t *inputs, gpio_port_pins_t *outputs);
1056
1057#ifdef CONFIG_GPIO_GET_DIRECTION
1058static inline int z_impl_gpio_port_get_direction(const struct device *port, gpio_port_pins_t map,
1059 gpio_port_pins_t *inputs,
1060 gpio_port_pins_t *outputs)
1061{
1062 const struct gpio_driver_api *api = (const struct gpio_driver_api *)port->api;
1063
1064 if (api->port_get_direction == NULL) {
1065 return -ENOSYS;
1066 }
1067
1068 return api->port_get_direction(port, map, inputs, outputs);
1069}
1070#endif /* CONFIG_GPIO_GET_DIRECTION */
1071
1084static inline int gpio_pin_is_input(const struct device *port, gpio_pin_t pin)
1085{
1086 int rv;
1087 gpio_port_pins_t pins;
1088 __unused const struct gpio_driver_config *cfg =
1089 (const struct gpio_driver_config *)port->config;
1090
1091 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U, "Unsupported pin");
1092
1093 rv = gpio_port_get_direction(port, BIT(pin), &pins, NULL);
1094 if (rv < 0) {
1095 return rv;
1096 }
1097
1098 return (int)!!((gpio_port_pins_t)BIT(pin) & pins);
1099}
1100
1112static inline int gpio_pin_is_input_dt(const struct gpio_dt_spec *spec)
1113{
1114 return gpio_pin_is_input(spec->port, spec->pin);
1115}
1116
1129static inline int gpio_pin_is_output(const struct device *port, gpio_pin_t pin)
1130{
1131 int rv;
1132 gpio_port_pins_t pins;
1133 __unused const struct gpio_driver_config *cfg =
1134 (const struct gpio_driver_config *)port->config;
1135
1136 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U, "Unsupported pin");
1137
1138 rv = gpio_port_get_direction(port, BIT(pin), NULL, &pins);
1139 if (rv < 0) {
1140 return rv;
1141 }
1142
1143 return (int)!!((gpio_port_pins_t)BIT(pin) & pins);
1144}
1145
1157static inline int gpio_pin_is_output_dt(const struct gpio_dt_spec *spec)
1158{
1159 return gpio_pin_is_output(spec->port, spec->pin);
1160}
1161
1177__syscall int gpio_pin_get_config(const struct device *port, gpio_pin_t pin,
1179
1180#ifdef CONFIG_GPIO_GET_CONFIG
1181static inline int z_impl_gpio_pin_get_config(const struct device *port,
1182 gpio_pin_t pin,
1184{
1185 const struct gpio_driver_api *api =
1186 (const struct gpio_driver_api *)port->api;
1187
1188 if (api->pin_get_config == NULL)
1189 return -ENOSYS;
1190
1191 return api->pin_get_config(port, pin, flags);
1192}
1193#endif
1194
1207static inline int gpio_pin_get_config_dt(const struct gpio_dt_spec *spec,
1209{
1210 return gpio_pin_get_config(spec->port, spec->pin, flags);
1211}
1212
1230__syscall int gpio_port_get_raw(const struct device *port,
1231 gpio_port_value_t *value);
1232
1233static inline int z_impl_gpio_port_get_raw(const struct device *port,
1234 gpio_port_value_t *value)
1235{
1236 const struct gpio_driver_api *api =
1237 (const struct gpio_driver_api *)port->api;
1238
1239 return api->port_get_raw(port, value);
1240}
1241
1260static inline int gpio_port_get(const struct device *port,
1261 gpio_port_value_t *value)
1262{
1263 const struct gpio_driver_data *const data =
1264 (const struct gpio_driver_data *)port->data;
1265 int ret;
1266
1267 ret = gpio_port_get_raw(port, value);
1268 if (ret == 0) {
1269 *value ^= data->invert;
1270 }
1271
1272 return ret;
1273}
1274
1292__syscall int gpio_port_set_masked_raw(const struct device *port,
1293 gpio_port_pins_t mask,
1294 gpio_port_value_t value);
1295
1296static inline int z_impl_gpio_port_set_masked_raw(const struct device *port,
1297 gpio_port_pins_t mask,
1298 gpio_port_value_t value)
1299{
1300 const struct gpio_driver_api *api =
1301 (const struct gpio_driver_api *)port->api;
1302
1303 return api->port_set_masked_raw(port, mask, value);
1304}
1305
1326static inline int gpio_port_set_masked(const struct device *port,
1327 gpio_port_pins_t mask,
1328 gpio_port_value_t value)
1329{
1330 const struct gpio_driver_data *const data =
1331 (const struct gpio_driver_data *)port->data;
1332
1333 value ^= data->invert;
1334
1335 return gpio_port_set_masked_raw(port, mask, value);
1336}
1337
1348__syscall int gpio_port_set_bits_raw(const struct device *port,
1349 gpio_port_pins_t pins);
1350
1351static inline int z_impl_gpio_port_set_bits_raw(const struct device *port,
1352 gpio_port_pins_t pins)
1353{
1354 const struct gpio_driver_api *api =
1355 (const struct gpio_driver_api *)port->api;
1356
1357 return api->port_set_bits_raw(port, pins);
1358}
1359
1370static inline int gpio_port_set_bits(const struct device *port,
1371 gpio_port_pins_t pins)
1372{
1373 return gpio_port_set_masked(port, pins, pins);
1374}
1375
1386__syscall int gpio_port_clear_bits_raw(const struct device *port,
1387 gpio_port_pins_t pins);
1388
1389static inline int z_impl_gpio_port_clear_bits_raw(const struct device *port,
1390 gpio_port_pins_t pins)
1391{
1392 const struct gpio_driver_api *api =
1393 (const struct gpio_driver_api *)port->api;
1394
1395 return api->port_clear_bits_raw(port, pins);
1396}
1397
1408static inline int gpio_port_clear_bits(const struct device *port,
1409 gpio_port_pins_t pins)
1410{
1411 return gpio_port_set_masked(port, pins, 0);
1412}
1413
1424__syscall int gpio_port_toggle_bits(const struct device *port,
1425 gpio_port_pins_t pins);
1426
1427static inline int z_impl_gpio_port_toggle_bits(const struct device *port,
1428 gpio_port_pins_t pins)
1429{
1430 const struct gpio_driver_api *api =
1431 (const struct gpio_driver_api *)port->api;
1432
1433 return api->port_toggle_bits(port, pins);
1434}
1435
1447static inline int gpio_port_set_clr_bits_raw(const struct device *port,
1448 gpio_port_pins_t set_pins,
1449 gpio_port_pins_t clear_pins)
1450{
1451 __ASSERT((set_pins & clear_pins) == 0, "Set and Clear pins overlap");
1452
1453 return gpio_port_set_masked_raw(port, set_pins | clear_pins, set_pins);
1454}
1455
1467static inline int gpio_port_set_clr_bits(const struct device *port,
1468 gpio_port_pins_t set_pins,
1469 gpio_port_pins_t clear_pins)
1470{
1471 __ASSERT((set_pins & clear_pins) == 0, "Set and Clear pins overlap");
1472
1473 return gpio_port_set_masked(port, set_pins | clear_pins, set_pins);
1474}
1475
1491static inline int gpio_pin_get_raw(const struct device *port, gpio_pin_t pin)
1492{
1493 __unused const struct gpio_driver_config *const cfg =
1494 (const struct gpio_driver_config *)port->config;
1495 gpio_port_value_t value;
1496 int ret;
1497
1498 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
1499 "Unsupported pin");
1500
1501 ret = gpio_port_get_raw(port, &value);
1502 if (ret == 0) {
1503 ret = (value & (gpio_port_pins_t)BIT(pin)) != 0 ? 1 : 0;
1504 }
1505
1506 return ret;
1507}
1508
1528static inline int gpio_pin_get(const struct device *port, gpio_pin_t pin)
1529{
1530 __unused const struct gpio_driver_config *const cfg =
1531 (const struct gpio_driver_config *)port->config;
1532 gpio_port_value_t value;
1533 int ret;
1534
1535 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
1536 "Unsupported pin");
1537
1538 ret = gpio_port_get(port, &value);
1539 if (ret == 0) {
1540 ret = (value & (gpio_port_pins_t)BIT(pin)) != 0 ? 1 : 0;
1541 }
1542
1543 return ret;
1544}
1545
1556static inline int gpio_pin_get_dt(const struct gpio_dt_spec *spec)
1557{
1558 return gpio_pin_get(spec->port, spec->pin);
1559}
1560
1576static inline int gpio_pin_set_raw(const struct device *port, gpio_pin_t pin,
1577 int value)
1578{
1579 __unused const struct gpio_driver_config *const cfg =
1580 (const struct gpio_driver_config *)port->config;
1581 int ret;
1582
1583 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
1584 "Unsupported pin");
1585
1586 if (value != 0) {
1587 ret = gpio_port_set_bits_raw(port, (gpio_port_pins_t)BIT(pin));
1588 } else {
1590 }
1591
1592 return ret;
1593}
1594
1616static inline int gpio_pin_set(const struct device *port, gpio_pin_t pin,
1617 int value)
1618{
1619 __unused const struct gpio_driver_config *const cfg =
1620 (const struct gpio_driver_config *)port->config;
1621 const struct gpio_driver_data *const data =
1622 (const struct gpio_driver_data *)port->data;
1623
1624 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
1625 "Unsupported pin");
1626
1627 if (data->invert & (gpio_port_pins_t)BIT(pin)) {
1628 value = (value != 0) ? 0 : 1;
1629 }
1630
1631 return gpio_pin_set_raw(port, pin, value);
1632}
1633
1645static inline int gpio_pin_set_dt(const struct gpio_dt_spec *spec, int value)
1646{
1647 return gpio_pin_set(spec->port, spec->pin, value);
1648}
1649
1660static inline int gpio_pin_toggle(const struct device *port, gpio_pin_t pin)
1661{
1662 __unused const struct gpio_driver_config *const cfg =
1663 (const struct gpio_driver_config *)port->config;
1664
1665 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
1666 "Unsupported pin");
1667
1668 return gpio_port_toggle_bits(port, (gpio_port_pins_t)BIT(pin));
1669}
1670
1681static inline int gpio_pin_toggle_dt(const struct gpio_dt_spec *spec)
1682{
1683 return gpio_pin_toggle(spec->port, spec->pin);
1684}
1685
1692static inline void gpio_init_callback(struct gpio_callback *callback,
1694 gpio_port_pins_t pin_mask)
1695{
1696 __ASSERT(callback, "Callback pointer should not be NULL");
1697 __ASSERT(handler, "Callback handler pointer should not be NULL");
1698
1699 callback->handler = handler;
1700 callback->pin_mask = pin_mask;
1701}
1702
1717static inline int gpio_add_callback(const struct device *port,
1718 struct gpio_callback *callback)
1719{
1720 const struct gpio_driver_api *api =
1721 (const struct gpio_driver_api *)port->api;
1722
1723 if (api->manage_callback == NULL) {
1724 return -ENOSYS;
1725 }
1726
1727 return api->manage_callback(port, callback, true);
1728}
1729
1741static inline int gpio_add_callback_dt(const struct gpio_dt_spec *spec,
1742 struct gpio_callback *callback)
1743{
1744 return gpio_add_callback(spec->port, callback);
1745}
1746
1765static inline int gpio_remove_callback(const struct device *port,
1766 struct gpio_callback *callback)
1767{
1768 const struct gpio_driver_api *api =
1769 (const struct gpio_driver_api *)port->api;
1770
1771 if (api->manage_callback == NULL) {
1772 return -ENOSYS;
1773 }
1774
1775 return api->manage_callback(port, callback, false);
1776}
1777
1789static inline int gpio_remove_callback_dt(const struct gpio_dt_spec *spec,
1790 struct gpio_callback *callback)
1791{
1792 return gpio_remove_callback(spec->port, callback);
1793}
1794
1809__syscall int gpio_get_pending_int(const struct device *dev);
1810
1811static inline int z_impl_gpio_get_pending_int(const struct device *dev)
1812{
1813 const struct gpio_driver_api *api =
1814 (const struct gpio_driver_api *)dev->api;
1815
1816 if (api->get_pending_int == NULL) {
1817 return -ENOSYS;
1818 }
1819
1820 return api->get_pending_int(dev);
1821}
1822
1827#ifdef __cplusplus
1828}
1829#endif
1830
1831#include <zephyr/syscalls/gpio.h>
1832
1833#endif /* ZEPHYR_INCLUDE_DRIVERS_GPIO_H_ */
System error numbers.
bool device_is_ready(const struct device *dev)
Verify that a device is ready for use.
static int gpio_add_callback(const struct device *port, struct gpio_callback *callback)
Add an application callback.
Definition: gpio.h:1717
#define GPIO_OUTPUT
Enables pin as output, no change to the output state.
Definition: gpio.h:50
static int gpio_pin_get_raw(const struct device *port, gpio_pin_t pin)
Get physical level of an input pin.
Definition: gpio.h:1491
int gpio_pin_get_config(const struct device *port, gpio_pin_t pin, gpio_flags_t *flags)
Get a configuration of a single pin.
static int gpio_pin_is_input(const struct device *port, gpio_pin_t pin)
Check if pin is configured for input.
Definition: gpio.h:1084
static int gpio_pin_get(const struct device *port, gpio_pin_t pin)
Get logical level of an input pin.
Definition: gpio.h:1528
int gpio_port_set_bits_raw(const struct device *port, gpio_port_pins_t pins)
Set physical level of selected output pins to high.
static int gpio_pin_is_output_dt(const struct gpio_dt_spec *spec)
Check if a single pin from gpio_dt_spec is configured for output.
Definition: gpio.h:1157
static int gpio_pin_interrupt_configure_dt(const struct gpio_dt_spec *spec, gpio_flags_t flags)
Configure pin interrupts from a gpio_dt_spec.
Definition: gpio.h:940
void(* gpio_callback_handler_t)(const struct device *port, struct gpio_callback *cb, gpio_port_pins_t pins)
Define the application callback handler function signature.
Definition: gpio.h:726
static int gpio_remove_callback_dt(const struct gpio_dt_spec *spec, struct gpio_callback *callback)
Remove an application callback.
Definition: gpio.h:1789
static int gpio_pin_toggle_dt(const struct gpio_dt_spec *spec)
Toggle pin level from a gpio_dt_spec.
Definition: gpio.h:1681
uint8_t gpio_pin_t
Provides a type to hold a GPIO pin index.
Definition: gpio.h:254
static int gpio_pin_is_output(const struct device *port, gpio_pin_t pin)
Check if pin is configured for output.
Definition: gpio.h:1129
int gpio_get_pending_int(const struct device *dev)
Function to get pending interrupts.
static int gpio_pin_configure_dt(const struct gpio_dt_spec *spec, gpio_flags_t extra_flags)
Configure a single pin from a gpio_dt_spec and some extra flags.
Definition: gpio.h:1028
static int gpio_pin_set_dt(const struct gpio_dt_spec *spec, int value)
Set logical level of a output pin from a gpio_dt_spec.
Definition: gpio.h:1645
static int gpio_add_callback_dt(const struct gpio_dt_spec *spec, struct gpio_callback *callback)
Add an application callback.
Definition: gpio.h:1741
static int gpio_port_set_bits(const struct device *port, gpio_port_pins_t pins)
Set logical level of selected output pins to active.
Definition: gpio.h:1370
uint32_t gpio_flags_t
Provides a type to hold GPIO configuration flags.
Definition: gpio.h:274
#define GPIO_ACTIVE_LOW
GPIO pin is active (has logical value '1') in low state.
Definition: gpio.h:26
#define GPIO_INT_WAKEUP
Configures GPIO interrupt to wakeup the system from low power mode.
Definition: gpio.h:85
static int gpio_port_set_clr_bits_raw(const struct device *port, gpio_port_pins_t set_pins, gpio_port_pins_t clear_pins)
Set physical level of selected output pins.
Definition: gpio.h:1447
static int gpio_port_set_clr_bits(const struct device *port, gpio_port_pins_t set_pins, gpio_port_pins_t clear_pins)
Set logical level of selected output pins.
Definition: gpio.h:1467
static void gpio_init_callback(struct gpio_callback *callback, gpio_callback_handler_t handler, gpio_port_pins_t pin_mask)
Helper to initialize a struct gpio_callback properly.
Definition: gpio.h:1692
static int gpio_pin_is_input_dt(const struct gpio_dt_spec *spec)
Check if a single pin from gpio_dt_spec is configured for input.
Definition: gpio.h:1112
#define GPIO_INPUT
Enables pin as input.
Definition: gpio.h:47
uint32_t gpio_port_pins_t
Identifies a set of pins associated with a port.
Definition: gpio.h:233
static int gpio_pin_get_config_dt(const struct gpio_dt_spec *spec, gpio_flags_t *flags)
Get a configuration of a single pin from a gpio_dt_spec.
Definition: gpio.h:1207
int gpio_port_toggle_bits(const struct device *port, gpio_port_pins_t pins)
Toggle level of selected output pins.
#define GPIO_INT_DISABLE
Disables GPIO pin interrupt.
Definition: gpio.h:100
int gpio_pin_interrupt_configure(const struct device *port, gpio_pin_t pin, gpio_flags_t flags)
Configure pin interrupt.
int gpio_port_clear_bits_raw(const struct device *port, gpio_port_pins_t pins)
Set physical level of selected output pins to low.
int gpio_port_set_masked_raw(const struct device *port, gpio_port_pins_t mask, gpio_port_value_t value)
Set physical level of output pins in a port.
#define GPIO_PULL_UP
Enables GPIO pin pull-up.
Definition: gpio.h:75
static int gpio_pin_get_dt(const struct gpio_dt_spec *spec)
Get logical level of an input pin from a gpio_dt_spec.
Definition: gpio.h:1556
static int gpio_pin_toggle(const struct device *port, gpio_pin_t pin)
Toggle pin level.
Definition: gpio.h:1660
static bool gpio_is_ready_dt(const struct gpio_dt_spec *spec)
Validate that GPIO port is ready.
Definition: gpio.h:835
uint32_t gpio_port_value_t
Provides values for a set of pins associated with a port.
Definition: gpio.h:246
static int gpio_pin_set(const struct device *port, gpio_pin_t pin, int value)
Set logical level of an output pin.
Definition: gpio.h:1616
static int gpio_port_clear_bits(const struct device *port, gpio_port_pins_t pins)
Set logical level of selected output pins to inactive.
Definition: gpio.h:1408
static int gpio_remove_callback(const struct device *port, struct gpio_callback *callback)
Remove an application callback.
Definition: gpio.h:1765
static int gpio_port_set_masked(const struct device *port, gpio_port_pins_t mask, gpio_port_value_t value)
Set logical level of output pins in a port.
Definition: gpio.h:1326
int gpio_port_get_direction(const struct device *port, gpio_port_pins_t map, gpio_port_pins_t *inputs, gpio_port_pins_t *outputs)
Get direction of select pins in a port.
uint16_t gpio_dt_flags_t
Provides a type to hold GPIO devicetree flags.
Definition: gpio.h:266
#define GPIO_PULL_DOWN
Enable GPIO pin pull-down.
Definition: gpio.h:78
static int gpio_pin_set_raw(const struct device *port, gpio_pin_t pin, int value)
Set physical level of an output pin.
Definition: gpio.h:1576
int gpio_port_get_raw(const struct device *port, gpio_port_value_t *value)
Get physical level of all input pins in a port.
static int gpio_port_get(const struct device *port, gpio_port_value_t *value)
Get logical level of all input pins in a port.
Definition: gpio.h:1260
int gpio_pin_configure(const struct device *port, gpio_pin_t pin, gpio_flags_t flags)
Configure a single pin.
struct _snode sys_snode_t
Single-linked list node structure.
Definition: slist.h:39
#define BIT(n)
Unsigned integer with bit position n set (signed in assembly language).
Definition: util_macro.h:44
#define ENOSYS
Function not implemented.
Definition: errno.h:83
flags
Definition: parser.h:96
__UINT32_TYPE__ uint32_t
Definition: stdint.h:90
__UINT8_TYPE__ uint8_t
Definition: stdint.h:88
__UINT16_TYPE__ uint16_t
Definition: stdint.h:89
Runtime device structure (in ROM) per driver instance.
Definition: device.h:403
void * data
Address of the device instance private data.
Definition: device.h:413
const void * api
Address of the API structure exposed by the device instance.
Definition: device.h:409
const void * config
Address of device instance config information.
Definition: device.h:407
GPIO callback structure.
Definition: gpio.h:740
sys_snode_t node
This is meant to be used in the driver and the user should not mess with it (see drivers/gpio/gpio_ut...
Definition: gpio.h:744
gpio_port_pins_t pin_mask
A mask of pins the callback is interested in, if 0 the callback will never be called.
Definition: gpio.h:755
gpio_callback_handler_t handler
Actual callback function being called when relevant.
Definition: gpio.h:747
This structure is common to all GPIO drivers and is expected to be the first element in the object po...
Definition: gpio.h:690
gpio_port_pins_t port_pin_mask
Mask identifying pins supported by the controller.
Definition: gpio.h:696
This structure is common to all GPIO drivers and is expected to be the first element in the driver's ...
Definition: gpio.h:703
gpio_port_pins_t invert
Mask identifying pins that are configured as active low.
Definition: gpio.h:709
Container for GPIO pin information specified in devicetree.
Definition: gpio.h:288
const struct device * port
GPIO device controlling the pin.
Definition: gpio.h:290
gpio_pin_t pin
The pin's number on the device.
Definition: gpio.h:292
gpio_dt_flags_t dt_flags
The pin's configuration flags as specified in devicetree.
Definition: gpio.h:294