Zephyr API Documentation 4.0.99
A Scalable Open Source RTOS
Loading...
Searching...
No Matches
nrf-pinctrl.h File Reference

Go to the source code of this file.

Macros

#define NRF_PSEL(fun, port, pin)
 Utility macro to build nRF psels property entry.
 
#define NRF_PSEL_DISCONNECTED(fun)
 Utility macro to build nRF psels property entry when a pin is disconnected.
 
nRF pin configuration bit field positions and masks.
#define NRF_FUN_POS   24U
 Position of the function field.
 
#define NRF_FUN_MSK   0xFFU
 Mask for the function field.
 
#define NRF_GPD_FAST_ACTIVE1_POS   18U
 Position of the GPD FAST ACTIVE1.
 
#define NRF_GPD_FAST_ACTIVE1_MSK   0x1U
 Mask for the GPD FAST ACTIVE1.
 
#define NRF_CLOCKPIN_ENABLE_POS   17U
 Position of the clockpin enable field.
 
#define NRF_CLOCKPIN_ENABLE_MSK   0x1U
 Mask for the clockpin enable field.
 
#define NRF_INVERT_POS   16U
 Position of the invert field.
 
#define NRF_INVERT_MSK   0x1U
 Mask for the invert field.
 
#define NRF_LP_POS   15U
 Position of the low power field.
 
#define NRF_LP_MSK   0x1U
 Mask for the low power field.
 
#define NRF_DRIVE_POS   11U
 Position of the drive configuration field.
 
#define NRF_DRIVE_MSK   0xFU
 Mask for the drive configuration field.
 
#define NRF_PULL_POS   9U
 Position of the pull configuration field.
 
#define NRF_PULL_MSK   0x3U
 Mask for the pull configuration field.
 
#define NRF_PIN_POS   0U
 Position of the pin field.
 
#define NRF_PIN_MSK   0x1FFU
 Mask for the pin field.
 
nRF pinctrl pin functions.
#define NRF_FUN_UART_TX   0U
 UART TX.
 
#define NRF_FUN_UART_RX   1U
 UART RX.
 
#define NRF_FUN_UART_RTS   2U
 UART RTS.
 
#define NRF_FUN_UART_CTS   3U
 UART CTS.
 
#define NRF_FUN_SPIM_SCK   4U
 SPI master SCK.
 
#define NRF_FUN_SPIM_MOSI   5U
 SPI master MOSI.
 
#define NRF_FUN_SPIM_MISO   6U
 SPI master MISO.
 
#define NRF_FUN_SPIS_SCK   7U
 SPI slave SCK.
 
#define NRF_FUN_SPIS_MOSI   8U
 SPI slave MOSI.
 
#define NRF_FUN_SPIS_MISO   9U
 SPI slave MISO.
 
#define NRF_FUN_SPIS_CSN   10U
 SPI slave CSN.
 
#define NRF_FUN_TWIM_SCL   11U
 TWI master SCL.
 
#define NRF_FUN_TWIM_SDA   12U
 TWI master SDA.
 
#define NRF_FUN_I2S_SCK_M   13U
 I2S SCK in master mode.
 
#define NRF_FUN_I2S_SCK_S   14U
 I2S SCK in slave mode.
 
#define NRF_FUN_I2S_LRCK_M   15U
 I2S LRCK in master mode.
 
#define NRF_FUN_I2S_LRCK_S   16U
 I2S LRCK in slave mode.
 
#define NRF_FUN_I2S_SDIN   17U
 I2S SDIN.
 
#define NRF_FUN_I2S_SDOUT   18U
 I2S SDOUT.
 
#define NRF_FUN_I2S_MCK   19U
 I2S MCK.
 
#define NRF_FUN_PDM_CLK   20U
 PDM CLK.
 
#define NRF_FUN_PDM_DIN   21U
 PDM DIN.
 
#define NRF_FUN_PWM_OUT0   22U
 PWM OUT0.
 
#define NRF_FUN_PWM_OUT1   23U
 PWM OUT1.
 
#define NRF_FUN_PWM_OUT2   24U
 PWM OUT2.
 
#define NRF_FUN_PWM_OUT3   25U
 PWM OUT3.
 
#define NRF_FUN_QDEC_A   26U
 QDEC A.
 
#define NRF_FUN_QDEC_B   27U
 QDEC B.
 
#define NRF_FUN_QDEC_LED   28U
 QDEC LED.
 
#define NRF_FUN_QSPI_SCK   29U
 QSPI SCK.
 
#define NRF_FUN_QSPI_CSN   30U
 QSPI CSN.
 
#define NRF_FUN_QSPI_IO0   31U
 QSPI IO0.
 
#define NRF_FUN_QSPI_IO1   32U
 QSPI IO1.
 
#define NRF_FUN_QSPI_IO2   33U
 QSPI IO2.
 
#define NRF_FUN_QSPI_IO3   34U
 QSPI IO3.
 
#define NRF_FUN_EXMIF_CK   35U
 EXMIF CK.
 
#define NRF_FUN_EXMIF_DQ0   36U
 EXMIF DQ0.
 
#define NRF_FUN_EXMIF_DQ1   37U
 EXMIF DQ1.
 
#define NRF_FUN_EXMIF_DQ2   38U
 EXMIF DQ2.
 
#define NRF_FUN_EXMIF_DQ3   39U
 EXMIF DQ3.
 
#define NRF_FUN_EXMIF_DQ4   40U
 EXMIF DQ4.
 
#define NRF_FUN_EXMIF_DQ5   41U
 EXMIF DQ5.
 
#define NRF_FUN_EXMIF_DQ6   42U
 EXMIF DQ6.
 
#define NRF_FUN_EXMIF_DQ7   43U
 EXMIF DQ7.
 
#define NRF_FUN_EXMIF_CS0   44U
 EXMIF CS0.
 
#define NRF_FUN_EXMIF_CS1   45U
 EXMIF CS1.
 
#define NRF_FUN_CAN_TX   46U
 CAN TX.
 
#define NRF_FUN_CAN_RX   47U
 CAN RX.
 
nRF pinctrl output drive.
#define NRF_DRIVE_S0S1   0U
 Standard '0', standard '1'.
 
#define NRF_DRIVE_H0S1   1U
 High drive '0', standard '1'.
 
#define NRF_DRIVE_S0H1   2U
 Standard '0', high drive '1'.
 
#define NRF_DRIVE_H0H1   3U
 High drive '0', high drive '1'.
 
#define NRF_DRIVE_D0S1   4U
 Disconnect '0' standard '1'.
 
#define NRF_DRIVE_D0H1   5U
 Disconnect '0', high drive '1'.
 
#define NRF_DRIVE_S0D1   6U
 Standard '0', disconnect '1'.
 
#define NRF_DRIVE_H0D1   7U
 High drive '0', disconnect '1'.
 
#define NRF_DRIVE_E0E1   8U
 Extra high drive '0', extra high drive '1'.
 
nRF pinctrl pull-up/down.
Note
Values match nrf_gpio_pin_pull_t constants.
#define NRF_PULL_NONE   0U
 Pull-up disabled.
 
#define NRF_PULL_DOWN   1U
 Pull-down enabled.
 
#define NRF_PULL_UP   3U
 Pull-up enabled.
 
nRF pinctrl low power mode.
#define NRF_LP_DISABLE   0U
 Input.
 
#define NRF_LP_ENABLE   1U
 Output.
 
nRF pinctrl helpers to indicate disconnected pins.
#define NRF_PIN_DISCONNECTED   NRF_PIN_MSK
 Indicates that a pin is disconnected.
 

Macro Definition Documentation

◆ NRF_CLOCKPIN_ENABLE_MSK

#define NRF_CLOCKPIN_ENABLE_MSK   0x1U

Mask for the clockpin enable field.

◆ NRF_CLOCKPIN_ENABLE_POS

#define NRF_CLOCKPIN_ENABLE_POS   17U

Position of the clockpin enable field.

◆ NRF_DRIVE_D0H1

#define NRF_DRIVE_D0H1   5U

Disconnect '0', high drive '1'.

◆ NRF_DRIVE_D0S1

#define NRF_DRIVE_D0S1   4U

Disconnect '0' standard '1'.

◆ NRF_DRIVE_E0E1

#define NRF_DRIVE_E0E1   8U

Extra high drive '0', extra high drive '1'.

◆ NRF_DRIVE_H0D1

#define NRF_DRIVE_H0D1   7U

High drive '0', disconnect '1'.

◆ NRF_DRIVE_H0H1

#define NRF_DRIVE_H0H1   3U

High drive '0', high drive '1'.

◆ NRF_DRIVE_H0S1

#define NRF_DRIVE_H0S1   1U

High drive '0', standard '1'.

◆ NRF_DRIVE_MSK

#define NRF_DRIVE_MSK   0xFU

Mask for the drive configuration field.

◆ NRF_DRIVE_POS

#define NRF_DRIVE_POS   11U

Position of the drive configuration field.

◆ NRF_DRIVE_S0D1

#define NRF_DRIVE_S0D1   6U

Standard '0', disconnect '1'.

◆ NRF_DRIVE_S0H1

#define NRF_DRIVE_S0H1   2U

Standard '0', high drive '1'.

◆ NRF_DRIVE_S0S1

#define NRF_DRIVE_S0S1   0U

Standard '0', standard '1'.

◆ NRF_FUN_CAN_RX

#define NRF_FUN_CAN_RX   47U

CAN RX.

◆ NRF_FUN_CAN_TX

#define NRF_FUN_CAN_TX   46U

CAN TX.

◆ NRF_FUN_EXMIF_CK

#define NRF_FUN_EXMIF_CK   35U

EXMIF CK.

◆ NRF_FUN_EXMIF_CS0

#define NRF_FUN_EXMIF_CS0   44U

EXMIF CS0.

◆ NRF_FUN_EXMIF_CS1

#define NRF_FUN_EXMIF_CS1   45U

EXMIF CS1.

◆ NRF_FUN_EXMIF_DQ0

#define NRF_FUN_EXMIF_DQ0   36U

EXMIF DQ0.

◆ NRF_FUN_EXMIF_DQ1

#define NRF_FUN_EXMIF_DQ1   37U

EXMIF DQ1.

◆ NRF_FUN_EXMIF_DQ2

#define NRF_FUN_EXMIF_DQ2   38U

EXMIF DQ2.

◆ NRF_FUN_EXMIF_DQ3

#define NRF_FUN_EXMIF_DQ3   39U

EXMIF DQ3.

◆ NRF_FUN_EXMIF_DQ4

#define NRF_FUN_EXMIF_DQ4   40U

EXMIF DQ4.

◆ NRF_FUN_EXMIF_DQ5

#define NRF_FUN_EXMIF_DQ5   41U

EXMIF DQ5.

◆ NRF_FUN_EXMIF_DQ6

#define NRF_FUN_EXMIF_DQ6   42U

EXMIF DQ6.

◆ NRF_FUN_EXMIF_DQ7

#define NRF_FUN_EXMIF_DQ7   43U

EXMIF DQ7.

◆ NRF_FUN_I2S_LRCK_M

#define NRF_FUN_I2S_LRCK_M   15U

I2S LRCK in master mode.

◆ NRF_FUN_I2S_LRCK_S

#define NRF_FUN_I2S_LRCK_S   16U

I2S LRCK in slave mode.

◆ NRF_FUN_I2S_MCK

#define NRF_FUN_I2S_MCK   19U

I2S MCK.

◆ NRF_FUN_I2S_SCK_M

#define NRF_FUN_I2S_SCK_M   13U

I2S SCK in master mode.

◆ NRF_FUN_I2S_SCK_S

#define NRF_FUN_I2S_SCK_S   14U

I2S SCK in slave mode.

◆ NRF_FUN_I2S_SDIN

#define NRF_FUN_I2S_SDIN   17U

I2S SDIN.

◆ NRF_FUN_I2S_SDOUT

#define NRF_FUN_I2S_SDOUT   18U

I2S SDOUT.

◆ NRF_FUN_MSK

#define NRF_FUN_MSK   0xFFU

Mask for the function field.

◆ NRF_FUN_PDM_CLK

#define NRF_FUN_PDM_CLK   20U

PDM CLK.

◆ NRF_FUN_PDM_DIN

#define NRF_FUN_PDM_DIN   21U

PDM DIN.

◆ NRF_FUN_POS

#define NRF_FUN_POS   24U

Position of the function field.

◆ NRF_FUN_PWM_OUT0

#define NRF_FUN_PWM_OUT0   22U

PWM OUT0.

◆ NRF_FUN_PWM_OUT1

#define NRF_FUN_PWM_OUT1   23U

PWM OUT1.

◆ NRF_FUN_PWM_OUT2

#define NRF_FUN_PWM_OUT2   24U

PWM OUT2.

◆ NRF_FUN_PWM_OUT3

#define NRF_FUN_PWM_OUT3   25U

PWM OUT3.

◆ NRF_FUN_QDEC_A

#define NRF_FUN_QDEC_A   26U

QDEC A.

◆ NRF_FUN_QDEC_B

#define NRF_FUN_QDEC_B   27U

QDEC B.

◆ NRF_FUN_QDEC_LED

#define NRF_FUN_QDEC_LED   28U

QDEC LED.

◆ NRF_FUN_QSPI_CSN

#define NRF_FUN_QSPI_CSN   30U

QSPI CSN.

◆ NRF_FUN_QSPI_IO0

#define NRF_FUN_QSPI_IO0   31U

QSPI IO0.

◆ NRF_FUN_QSPI_IO1

#define NRF_FUN_QSPI_IO1   32U

QSPI IO1.

◆ NRF_FUN_QSPI_IO2

#define NRF_FUN_QSPI_IO2   33U

QSPI IO2.

◆ NRF_FUN_QSPI_IO3

#define NRF_FUN_QSPI_IO3   34U

QSPI IO3.

◆ NRF_FUN_QSPI_SCK

#define NRF_FUN_QSPI_SCK   29U

QSPI SCK.

◆ NRF_FUN_SPIM_MISO

#define NRF_FUN_SPIM_MISO   6U

SPI master MISO.

◆ NRF_FUN_SPIM_MOSI

#define NRF_FUN_SPIM_MOSI   5U

SPI master MOSI.

◆ NRF_FUN_SPIM_SCK

#define NRF_FUN_SPIM_SCK   4U

SPI master SCK.

◆ NRF_FUN_SPIS_CSN

#define NRF_FUN_SPIS_CSN   10U

SPI slave CSN.

◆ NRF_FUN_SPIS_MISO

#define NRF_FUN_SPIS_MISO   9U

SPI slave MISO.

◆ NRF_FUN_SPIS_MOSI

#define NRF_FUN_SPIS_MOSI   8U

SPI slave MOSI.

◆ NRF_FUN_SPIS_SCK

#define NRF_FUN_SPIS_SCK   7U

SPI slave SCK.

◆ NRF_FUN_TWIM_SCL

#define NRF_FUN_TWIM_SCL   11U

TWI master SCL.

◆ NRF_FUN_TWIM_SDA

#define NRF_FUN_TWIM_SDA   12U

TWI master SDA.

◆ NRF_FUN_UART_CTS

#define NRF_FUN_UART_CTS   3U

UART CTS.

◆ NRF_FUN_UART_RTS

#define NRF_FUN_UART_RTS   2U

UART RTS.

◆ NRF_FUN_UART_RX

#define NRF_FUN_UART_RX   1U

UART RX.

◆ NRF_FUN_UART_TX

#define NRF_FUN_UART_TX   0U

UART TX.

◆ NRF_GPD_FAST_ACTIVE1_MSK

#define NRF_GPD_FAST_ACTIVE1_MSK   0x1U

Mask for the GPD FAST ACTIVE1.

◆ NRF_GPD_FAST_ACTIVE1_POS

#define NRF_GPD_FAST_ACTIVE1_POS   18U

Position of the GPD FAST ACTIVE1.

◆ NRF_INVERT_MSK

#define NRF_INVERT_MSK   0x1U

Mask for the invert field.

◆ NRF_INVERT_POS

#define NRF_INVERT_POS   16U

Position of the invert field.

◆ NRF_LP_DISABLE

#define NRF_LP_DISABLE   0U

Input.

◆ NRF_LP_ENABLE

#define NRF_LP_ENABLE   1U

Output.

◆ NRF_LP_MSK

#define NRF_LP_MSK   0x1U

Mask for the low power field.

◆ NRF_LP_POS

#define NRF_LP_POS   15U

Position of the low power field.

◆ NRF_PIN_DISCONNECTED

#define NRF_PIN_DISCONNECTED   NRF_PIN_MSK

Indicates that a pin is disconnected.

◆ NRF_PIN_MSK

#define NRF_PIN_MSK   0x1FFU

Mask for the pin field.

◆ NRF_PIN_POS

#define NRF_PIN_POS   0U

Position of the pin field.

◆ NRF_PSEL

#define NRF_PSEL ( fun,
port,
pin )
Value:
((((((port) * 32U) + (pin)) & NRF_PIN_MSK) << NRF_PIN_POS) | \
((NRF_FUN_ ## fun & NRF_FUN_MSK) << NRF_FUN_POS))
#define NRF_FUN_POS
Position of the function field.
Definition nrf-pinctrl.h:30
#define NRF_PIN_MSK
Mask for the pin field.
Definition nrf-pinctrl.h:60
#define NRF_PIN_POS
Position of the pin field.
Definition nrf-pinctrl.h:58
#define NRF_FUN_MSK
Mask for the function field.
Definition nrf-pinctrl.h:32

Utility macro to build nRF psels property entry.

Parameters
funPin function configuration (see NRF_FUNC_{name} macros).
portPort (0 or 15).
pinPin (0..31).

◆ NRF_PSEL_DISCONNECTED

#define NRF_PSEL_DISCONNECTED ( fun)
Value:
((NRF_FUN_ ## fun & NRF_FUN_MSK) << NRF_FUN_POS))
#define NRF_PIN_DISCONNECTED
Indicates that a pin is disconnected.
Definition nrf-pinctrl.h:227

Utility macro to build nRF psels property entry when a pin is disconnected.

This can be useful in situations where code running before Zephyr, e.g. a bootloader configures pins that later needs to be disconnected.

Parameters
funPin function configuration (see NRF_FUN_{name} macros).

◆ NRF_PULL_DOWN

#define NRF_PULL_DOWN   1U

Pull-down enabled.

◆ NRF_PULL_MSK

#define NRF_PULL_MSK   0x3U

Mask for the pull configuration field.

◆ NRF_PULL_NONE

#define NRF_PULL_NONE   0U

Pull-up disabled.

◆ NRF_PULL_POS

#define NRF_PULL_POS   9U

Position of the pull configuration field.

◆ NRF_PULL_UP

#define NRF_PULL_UP   3U

Pull-up enabled.