Zephyr API Documentation 4.2.99
A Scalable Open Source RTOS
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spi_config Struct Reference

SPI controller configuration structure. More...

#include <zephyr/drivers/spi.h>

Data Fields

uint32_t frequency
 Bus frequency in Hertz.
spi_operation_t operation
 Operation flags.
uint16_t slave
 Slave number from 0 to host controller slave limit.
struct spi_cs_control cs
 GPIO chip-select line (optional, must be initialized to zero if not used).
uint16_t word_delay
 Delay between SPI words on SCK line in nanoseconds, if supported.

Detailed Description

SPI controller configuration structure.

Warning
Most drivers use pointer comparison to determine whether a passed configuration is different from one used in a previous transaction. Changes to fields in the structure may not be detected.

Field Documentation

◆ cs

struct spi_cs_control spi_config::cs

GPIO chip-select line (optional, must be initialized to zero if not used).

◆ frequency

uint32_t spi_config::frequency

Bus frequency in Hertz.

◆ operation

spi_operation_t spi_config::operation

Operation flags.

It is a bit field with the following parts:

  • 0: Master or slave.
  • 1..3: Clock polarity, phase and loop mode.
  • 4: LSB or MSB first.
  • 5..10: Size of a data frame (word) in bits.
  • 11: Full/half duplex.
  • 12: Hold on the CS line if possible.
  • 13: Keep resource locked for the caller.
  • 14: Active high CS logic.
  • 15: Motorola or TI frame format (optional).

If CONFIG_SPI_EXTENDED_MODES is enabled:

  • 16..17: MISO lines (Single/Dual/Quad/Octal).
  • 18..31: Reserved for future use.

◆ slave

uint16_t spi_config::slave

Slave number from 0 to host controller slave limit.

◆ word_delay

uint16_t spi_config::word_delay

Delay between SPI words on SCK line in nanoseconds, if supported.

Value of zero will attempt to use half of the SCK period.


The documentation for this struct was generated from the following file: