nRF7002 DK
Overview
The nRF7002 DK (PCA10143) is a single-board development kit for evaluation and development on the nRF7002, a Wi-Fi companion IC to Nordic Semiconductor’s nRF5340 System-on-Chip (SoC) host processor. It is certified for the Wi-Fi Alliance® Wi-Fi Certification program [1] in the Connectivity, Security, and Optimization categories. See UG Wi-Fi certification [2] for detailed information.
The nRF7002 is an IEEE 802.11ax (Wi-Fi 6) compliant solution that implements the Wi-Fi physical layer and Medium Access Control (MAC) layer protocols. It implements the nRF Wi-Fi driver software on the nRF5340 host processor communicating over the QSPI bus.
The nRF5340 host is a dual-core SoC based on the Arm® Cortex®-M33 architecture. It has the following features:
A full-featured Arm Cortex-M33F core with DSP instructions, FPU, and Armv8-M Security Extension, running at up to 128 MHz, referred to as the application core.
A secondary Arm Cortex-M33 core, with a reduced feature set, running at a fixed 64 MHz, referred to as the network core.
The nrf7002dk/nrf5340/cpuapp
board target provides support for the application core on the
nRF5340 SoC. The nrf7002dk/nrf5340/cpunet
board target provides support for the network
core on the nRF5340 SoC.
More information about the board can be found at the nRF7002 DK website [4]. The nRF7002 DK Product Specification [5] contains the processor’s information and the datasheet.
Hardware
nRF7002 DK: The nRF7002 DK has two external oscillators.
The frequency of the slow clock is 32.768 kHz.
The frequency of the main clock is 32 MHz.
Micro-USB 2.0 cable
Supported features
The nrf7002dk
board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo
-
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
Type |
Location |
Description |
Compatible |
---|---|---|---|
CPU |
on-chip |
ARM Cortex-M33F CPU1 |
|
ADC |
on-chip |
Nordic Semiconductor nRF family SAADC node1 |
|
on-board |
ADC channels exposed on Arduino Uno (R3) headers1 |
||
ARM architecture |
on-chip |
Nordic UICR (User Information Configuration Registers)1 |
|
on-chip |
Nordic nRF family DCNF (Domain Configuration)1 |
||
on-chip |
Nordic nRF family RESET (Reset Control)1 |
||
on-chip |
Nordic nRF family CTRL-AP (Control Access Port)1 |
||
on-chip |
Nordic EGU (Event Generator Unit)6 |
||
on-chip |
Nordic nRF family MUTEX (Mutual Exclusive Peripheral)1 |
||
on-chip |
Nordic KMU (Key Management Unit)1 |
||
on-chip |
Nordic SPU (System Protection Unit)1 |
||
Audio |
on-chip |
Nordic PDM (Pulse Density Modulation interface)1 |
|
Clock control |
on-chip |
Nordic nRF53X OSCILLATORS (Oscillator Control)1 |
|
on-chip |
Nordic nRF low-frequency crystal oscillator (nRF53 series)1 |
||
on-chip |
Nordic nRF high-frequency crystal oscillator (nRF53 series)1 |
||
on-chip |
Nordic nRF clock control node1 |
||
Comparator |
on-chip |
Nordic nRF COMP (analog COMParator)1 |
|
Counter |
on-chip |
Nordic nRF timer node3 |
|
Cryptographic accelerator |
on-chip |
ARM TrustZone CryptoCell 3121 |
|
Debug |
on-chip |
ARMv8 instrumentation trace macrocell1 |
|
Flash controller |
on-chip |
Properties defining the interface for the Nordic QSPI peripheral1 |
|
on-chip |
Nordic NVMC (Non-Volatile Memory Controller)1 |
||
GPIO & Headers |
on-chip |
NRF5 GPIO2 |
|
on-chip |
|||
on-board |
GPIO pins exposed on Arduino Uno (R3) headers1 |
||
on-board |
This is an abstract device responsible for forwarding pins between cores1 |
||
I2C |
on-chip |
||
I2S |
on-chip |
Nordic I2S (Inter-IC sound interface)1 |
|
IEEE 802.15.4 |
on-chip |
Nordic nRF IEEE 802.15.4 node1 |
|
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
ARMv8-M NVIC (Nested Vectored Interrupt Controller)1 |
|
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
on-board |
Group of PWM-controlled LEDs1 |
||
Mailbox |
on-chip |
Nordic nRF family IPC (MBOX Interprocessor Communication)1 |
|
Miscellaneous |
on-chip |
Nordic FICR (Factory Information Configuration Registers)1 |
|
on-chip |
Nordic DPPIC (Distributed Programmable Peripheral Interconnect Controller)1 |
||
MMU / MPU |
on-chip |
ARMv8-M MPU (Memory Protection Unit)1 |
|
MTD |
on-board |
Properties supporting Zephyr spi-nor flash driver (over the Zephyr SPI API) control of serial flash memories using the standard M25P80-based command set1 |
|
on-chip |
Flash node1 |
||
on-chip |
Fixed partitions of a flash (or other non-volatile storage) memory1 |
||
Networking |
on-chip |
Nordic nRF family NFCT (Near Field Communication Tag)1 |
|
Pin control |
on-chip |
The nRF pin controller is a singleton node responsible for controlling pin function selection and pin properties1 |
|
Power management |
on-chip |
Nordic nRF power control node1 |
|
on-chip |
Nordic nRF family USBREG (USB Regulator Control)1 |
||
on-chip |
Nordic VMC (Volatile Memory Controller)1 |
||
PWM |
on-chip |
||
on-chip |
nRFx S/W PWM1 |
||
Regulator |
on-chip |
Nordic REGULATORS (voltage regulators control module) on nRF53X1 |
|
on-chip |
Nordic nRF5X regulator (fixed stage of the core supply)2 |
||
on-chip |
Nordic nRF53X regulator (high voltage stage of the main supply)1 |
||
Retained memory |
on-chip |
Nordic GPREGRET (General Purpose Register Retention) device2 |
|
RTC |
on-chip |
Nordic nRF RTC (Real-Time Counter)2 |
|
Sensors |
on-chip |
Nordic nRF quadrature decoder (QDEC) node2 |
|
Serial controller |
on-chip |
||
SPI |
on-chip |
||
SRAM |
on-chip |
Generic on-chip SRAM description1 |
|
Timer |
on-chip |
ARMv8-M System Tick1 |
|
USB |
on-chip |
Nordic nRF52 USB device controller1 |
|
Watchdog |
on-chip |
||
Wi-Fi |
on-board |
nRF7002 Wi-Fi chip with QSPI interface1 |
|
on-board |
nRF7002 Wi-Fi chip with COEX interface1 |
See nRF7002 DK Product Specification [5] for a complete list of nRF7002 DK board hardware features.
Connections and IOs
The connections and IOs supported by the development kit are listed in this section.
LED
LED 1 (green) = P1.06
LED 2 (green) = P1.07
Wi-Fi control
BUCKEN = P0.12
IOVDD CONTROL = P0.31
HOST IRQ = P0.23
COEX_REQ = P0.28
COEX_STATUS0 = P0.30
COEX_STATUS1 = P0.29
COEX_GRANT = P0.24
Security components
The following security components are available:
Implementation Defined Attribution Unit (IDAU [3]) on the application core.
The IDAU is implemented with the System Protection Unit and is used to define secure and non-secure memory maps. By default, the entire memory space (Flash, SRAM, and peripheral address space) is defined to be secure-accessible only.
Secure boot.
Programming and Debugging
The nRF5340 application core supports the Armv8-M Security Extension.
Applications built for the nrf7002dk/nrf5340/cpuapp
board boot by default in the
secure state.
The nRF5340 network core does not support the Armv8-M Security Extension. nRF5340 IDAU can configure bus accesses by the nRF5340 network core to have the secure attribute set. This allows to build and run secure-only applications on the nRF5340 SoC.
Building Secure/Non-Secure Zephyr applications with Arm® TrustZone®
Applications on the nRF5340 may contain a Secure and a Non-Secure firmware image for the application core. The Secure image can be built using either Zephyr or Trusted Firmware M [6] (TF-M). Non-Secure firmware images are always built using Zephyr. The two alternatives are described below.
Note
By default, SPE for the nRF5340 application core is built using TF-M.
Building the Secure firmware with TF-M
The process to build the Secure firmware image using TF-M and the Non-Secure firmware image using Zephyr requires the following steps:
Build the Non-Secure Zephyr application for the application core using
-DBOARD=nrf7002dk/nrf5340/cpuapp/ns
. To invoke the building of TF-M the Zephyr build system requires the Kconfig optionBUILD_WITH_TFM
to be enabled, which is done by default when building Zephyr as a Non-Secure application. The Zephyr build system will perform the following steps automatically:Build the Non-Secure firmware image as a regular Zephyr application
Build a TF-M (secure) firmware image
Merge the output image binaries together
Optionally build a bootloader image (MCUboot)
Note
Depending on the TF-M configuration, an application DTS overlay may be required, to adjust the Non-Secure image Flash and SRAM starting address and sizes.
Build the application firmware for the network core using
-DBOARD=nrf7002dk/nrf5340/cpunet
.
Building the Secure firmware using Zephyr
The process to build the Secure and the Non-Secure firmware images using Zephyr requires the following steps:
Build the Secure Zephyr application for the application core using
-DBOARD=nrf7002dk/nrf5340/cpuapp
andCONFIG_TRUSTED_EXECUTION_SECURE=y
andCONFIG_BUILD_WITH_TFM=n
in the application project configuration file.Build the Non-Secure Zephyr application for the application core using
-DBOARD=nrf7002dk/nrf5340/cpuapp/ns
.Merge the two binaries together.
Build the application firmware for the network core using
-DBOARD=nrf7002dk/nrf5340/cpunet
.
When building a Secure/Non-Secure application for the nRF5340 application core, the Secure application will have to set the IDAU (SPU) configuration to allow Non-Secure access to all CPU resources utilized by the Non-Secure application firmware. SPU configuration shall take place before jumping to the Non-Secure application.
Building a Secure only application
Build the Zephyr app in the usual way (see Building an Application
and Run an Application), using -DBOARD=nrf7002dk/nrf5340/cpuapp
for
the firmware running on the nRF5340 application core, and using
-DBOARD=nrf7002dk/nrf5340/cpunet
for the firmware running
on the nRF5340 network core.
Flashing
Follow the instructions in the Nordic nRF5x Segger J-Link page to install and configure all the necessary software. Further information can be found in Flashing. Then you can build and flash applications as usual (Building an Application and Run an Application for more details).
Warning
The nRF5340 has a flash read-back protection feature. When flash read-back
protection is active, you will need to recover the chip before reflashing.
If you are flashing with west, run
this command for more details on the related --recover
option:
west flash -H -r nrfjprog --skip-rebuild
Note
Flashing and debugging applications on the nRF5340 DK requires upgrading the nRF Command Line Tools to version 10.12.0. Further information on how to install the nRF Command Line Tools can be found in Flashing.
Here is an example for the Hello World application running on the nRF5340 application core.
First, run your favorite terminal program to listen for output.
$ minicom -D <tty_device> -b 115200
Replace <tty_device>
with the port where the board nRF7002 DK
can be found. For example, under Linux, /dev/ttyACM0
.
Then build and flash the application in the usual way.
# From the root of the zephyr repository
west build -b nrf7002dk/nrf5340/cpuapp samples/hello_world
west flash
Debugging
Refer to the Nordic nRF5x Segger J-Link page to learn about debugging Nordic boards with a Segger IC.
Next steps
You have now completed getting started with the nRF7002 DK. See the following links for where to go next:
Installation [7] and Configuring and Building [8] documentation to install the nRF Connect SDK and learn more about its development environment.
Developing with nRF70 [9] documentation for more advanced topics related to the nRF70 Series.
Wi-Fi [10] documentation for information related to Wi-Fi protocol and Wi-Fi modes of operation.