Nucleo H533RE

Board Overview

Nucleo H533RE

Name:

nucleo_h533re

Vendor:

STMicroelectronics

Architecture:

arm

SoC:

stm32h533xx

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Overview

The Nucleo H533RE board is designed as an affordable development platform for STMicroelectronics ARM® Cortex®-M33 core-based STM32H533RET6 microcontroller with TrustZone®. Here are some highlights of the Nucleo H533RE board:

• STM32H533RE microcontroller featuring 512 kbytes of Flash memory and 272 Kbytes of SRAM in LQFP64 package

• Board connectors:

  • USB Type-C™ Sink device FS

  • ST Zio expansion connector including Arduino Uno V3 connectivity (CN5, CN6, CN8, CN9)

  • ST morpho extension connector (CN7, CN10)

• Flexible board power supply:

  • 5V_USB_STLK from ST-Link USB connector

  • VIN (7 - 12V, 0.8) supplied via pin header CN6 pin 8 or CN7 pin 24

  • ESV on the ST morpho connector CN7 Pin 6 (5V, O.5A)

  • VBUS_STLK from a USB charger via the ST-LINK USB connector

  • VBUSC from the USB user connector (5V, 0.5A)

  • 3V3_EXT supplied via a pin header CN6 pin 4 or CN7 pin 16 (3.3V, 1.3A)

• On-board ST-LINK/V3EC debugger/programmer

  • mass storage

  • Virtual COM port

  • debug port

• One user LED shared with ARDUINO® Uno V3

• Two push-buttons: USER and RESET

• 32.768 kHz crystal oscillator

More information about the board can be found at the NUCLEO_H533RE website.

Hardware

The STM32H533xx devices are high-performance microcontrollers from the STM32H5 Series based on the high-performance Arm® Cortex®-M33 32-bit RISC core. They operate at a frequency of up to 250 MHz.

• Core: ARM® 32-bit Cortex® -M33 CPU with TrustZone® and FPU.

• Performance benchmark:

  • 375 DMPIS/MHz (Dhrystone 2.1)

• Security

  • Arm® TrustZone® with Armv8-M mainline security extension

  • Up to eight configurable SAU regions

  • TrustZone® aware and securable peripherals

  • Flexible life cycle scheme with secure debug authentication

  • SESIP3 and PSA Level 3 certified assurance target

  • Preconfigured immutable root of trust (ST-iROT)

  • SFI (secure firmware installation)

  • Root of trust thanks to unique boot entry and secure hide protection area (HDP)

  • Secure data storage with hardware unique key (HUK)

  • Secure firmware upgrade support with TF-M

  • Two AES coprocessors including one with DPA resistance

  • Public key accelerator, DPA resistant

  • On-the-fly decryption of Octo-SPI external memories

  • HASH hardware accelerator

  • True random number generator, NIST SP800-90B compliant

  • 96-bit unique ID

  • Active tampers

• Clock management:

  • 24 MHz crystal oscillator (HSE)

  • 32 kHz crystal oscillator for RTC (LSE)

  • Internal 64 MHz (HSI) trimmable by software

  • Internal low-power 32 kHz RC (LSI)( ±5%)

  • Internal 4 MHz oscillator (CSI), trimmable by software

  • Internal 48 MHz (HSI48) with recovery system

  • 3 PLLs for system clock, USB, audio, ADC

• Power management

  • Embedded regulator (LDO) with three configurable range output to supply the digital circuitry

  • Embedded SMPS step-down converter

• RTC with HW calendar, alarms and calibration

• Up to 112 fast I/Os, most 5 V-tolerant, up to 10 I/Os with independent supply down to 1.08 V

• Up to 16 timers and 2 watchdogs

  • 8x 16-bit

  • 2x 32-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input

  • 2x 16-bit low-power 16-bit timers (available in Stop mode)

  • 2x watchdogs

  • 2x SysTick timer

• Memories

  • Up to 512 Kbytes Flash, 2 banks read-while-write

  • 1 Kbyte OTP (one-time programmable)

  • 272 Kbytes of SRAM (80-Kbyte SRAM2 with ECC)

  • 2 Kbytes of backup SRAM available in the lowest power modes

  • Flexible external memory controller with up to 16-bit data bus: SRAM, PSRAM, FRAM, NOR/NAND memories

  • 1x OCTOSPI memory interface with on-the-fly decryption and support for serial PSRAM/NAND/NOR, Hyper RAM/Flash frame formats

  • 1x SD/SDIO/MMC interfaces

• Rich analog peripherals (independent supply)

  • 2x 12-bit ADC with up to 5 MSPS in 12-bit

  • 1x 12-bit DAC with 2 channels

  • 1x Digital temperature sensor

  • Voltage reference buffer

• 34x communication interfaces

  • 1x USB Type-C / USB power-delivery controller

  • 1x USB 2.0 full-speed host and device (crystal-less)

  • 3x I2C FM+ interfaces (SMBus/PMBus)

  • 2x I3C interface

  • 6x U(S)ARTS (ISO7816 interface, LIN, IrDA, modem control)

  • 1x LP UART

  • 4x SPIs including 3 muxed with full-duplex I2S

  • 4x additional SPI from 4x USART when configured in Synchronous mode

  • 2x FDCAN

  • 1x SDMMC interface

  • 2x 16 channel DMA controllers

  • 1x 8- to 14- bit camera interface

  • 1x HDMI-CEC

  • 1x 16-bit parallel slave synchronous-interface

• Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™

More information about STM32H533RE can be found here:

• STM32H533re on www.st.com

• STM32H533 reference manual

Supported Features

The nucleo_h533re board supports the hardware features listed below.

on-chip / on-board

Feature integrated in the SoC / present on the board.

2 / 2

Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.

vnd,foo

Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

nucleo_h533re

/

stm32h533xx

nucleo_h533re/stm32h533xx target

Type	Location	Description	Compatible
CPU	on-chip	ARM Cortex-M33 CPU1	arm,cortex-m33
ADC	on-chip	STM32 ADC1	st,stm32-adc
CAN	on-chip	STM32 FDCAN CAN FD controller1	st,stm32-fdcan
Clock control	on-chip	STM32U5 RCC (Reset and Clock controller)1	st,stm32u5-rcc
	on-chip	STM32 HSE Clock1	st,stm32-hse-clock
	on-chip	STM32 HSI Clock1	st,stm32h7-hsi-clock
	on-chip	Generic fixed-rate clock provider2 1	fixed-clock
	on-chip	STM32 LSE Clock1	st,stm32-lse-clock
	on-chip	STM32U5 PLL1 1	st,stm32u5-pll-clock
	on-chip	STM32 Microcontroller Clock Output (MCO)2	st,stm32-clock-mco
Counter	on-chip	STM32 counters4	st,stm32-counter
DAC	on-chip	STM32 family DAC1	st,stm32-dac
DMA	on-chip	STM32U5 DMA controller2	st,stm32u5-dma
Ethernet	on-chip	STM32H7 Ethernet1	st,stm32h7-ethernet
Flash controller	on-chip	STM32 Family flash controller1	st,stm32-flash-controller
GPIO & Headers	on-chip	STM32 GPIO Controller6	st,stm32-gpio
	on-board	GPIO pins exposed on Arduino Uno (R3) headers1	arduino-header-r3
	on-board	GPIO pins exposed on ST Morpho connector1	st-morpho-header
I2C	on-chip	STM32 I2C V2 controller2	st,stm32-i2c-v2
I2S	on-chip	STM32H7 I2S controller3	st,stm32h7-i2s
I3C	on-chip	STM32H5 I3C controller2	st,stm32-i3c
Input	on-board	Group of GPIO-bound input keys1	gpio-keys
Interrupt controller	on-chip	ARMv8-M NVIC (Nested Vectored Interrupt Controller)1	arm,v8m-nvic
	on-chip	STM32G0 External Interrupt Controller1	st,stm32g0-exti
LED	on-board	Group of GPIO-controlled LEDs1	gpio-leds
	on-board	Group of PWM-controlled LEDs1	pwm-leds
MDIO	on-chip	STM32 MDIO Controller1	st,stm32-mdio
Memory controller	on-chip	STM32 Flexible Memory Controller (FMC)1	st,stm32-fmc
MMU / MPU	on-chip	ARMv8-M MPU (Memory Protection Unit)1	arm,armv8m-mpu
MTD	on-chip	STM32 flash memory1	st,stm32-nv-flash
PHY	on-chip	This binding is to be used by all the usb transceivers which are built-in with USB IP1	usb-nop-xceiv
Pin control	on-chip	STM32 Pin controller1	st,stm32-pinctrl
PWM	on-chip	STM32 PWM1 4	st,stm32-pwm
Reset controller	on-chip	STM32 Reset and Clock Control (RCC) Controller1	st,stm32-rcc-rctl
RNG	on-chip	STM32 Random Number Generator1	st,stm32-rng
RTC	on-chip	STM32 RTC1	st,stm32-rtc
Sensors	on-chip	STM32 Digital Temperature Sensor1	st,stm32-digi-temp
	on-chip	STM32 family TEMP node for production calibrated sensors with two calibration temperatures1	st,stm32-temp-cal
	on-chip	STM32 VREF+1	st,stm32-vref
	on-chip	STM32 VBAT1	st,stm32-vbat
Serial controller	on-chip	STM32 USART2 1	st,stm32-usart
	on-chip	STM32 LPUART1	st,stm32-lpuart
SMbus	on-chip	STM32 SMBus controller2	st,stm32-smbus
SPI	on-chip	STM32H7 SPI controller1 2	st,stm32h7-spi
Timer	on-chip	ARMv8-M System Tick1	arm,armv8m-systick
	on-chip	STM32 low-power timer (LPTIM)2	st,stm32-lptim
	on-chip	STM32 timers1 4	st,stm32-timers
USB	on-chip	STM32 USB controller1	st,stm32-usb
Watchdog	on-chip	STM32 watchdog1	st,stm32-watchdog
	on-chip	STM32 system window watchdog1	st,stm32-window-watchdog

Zephyr board options

The STM32H533 is a SoC with Cortex-M33 architecture. Zephyr provides support for building for Secure firmware.

The BOARD options are summarized below:

BOARD	Description
nucleo_h533re	For building Secure firmware

Connections and IOs

Nucleo H533RE Board has 8 GPIO controllers. These controllers are responsible for pin muxing, input/output, pull-up, etc.

For more details please refer to STM32H5 Nucleo-64 board User Manual.

Default Zephyr Peripheral Mapping:

• ADC1 channel 0 input: PA0

• USART1 TX/RX : PB14/PB15 (Arduino USART1)

• SPI1 SCK/MISO/MOSI/NSS: PA5/PA6/PA7/PC9

• UART2 TX/RX : PA2/PA3 (VCP)

• USER_PB : PC13

System Clock

Nucleo H533RE System Clock could be driven by internal or external oscillator, as well as main PLL clock. By default System clock is driven by PLL clock at 240MHz, driven by an 24MHz high-speed external clock.

Serial Port

Nucleo H533RE board has up to 4 USARTs, 2 UARTs, and one LPUART. The Zephyr console output is assigned to USART2. Default settings are 115200 8N1.

Backup SRAM

In order to test backup SRAM, you may want to disconnect VBAT from VDD_MCU. You can do it by removing SB38 jumper on the back side of the board. VBAT can be provided via the left ST Morpho connector’s pin 33.

Programming and Debugging

Nucleo H533RE board includes an ST-LINK/V3EC embedded debug tool interface. This probe allows to flash the board using various tools.

Applications for the nucleo_h533re board can be built and flashed in the usual way (see Building an Application and Run an Application for more details).

OpenOCD Support

For now, openocd support for stm32h5 is not available on upstream OpenOCD. You can check OpenOCD official Github mirror. In order to use it though, you should clone from the customized STMicroelectronics OpenOCD Github and compile it following usual README guidelines. Once it is done, you can set the OPENOCD and OPENOCD_DEFAULT_PATH variables in boards/st/nucleo_h533re/board.cmake to point the build to the paths of the OpenOCD binary and its scripts, before including the common openocd.board.cmake file:

set(OPENOCD "<path_to_openocd_repo>/src/openocd" CACHE FILEPATH "" FORCE)
set(OPENOCD_DEFAULT_PATH <path_to_opneocd_repo>/tcl)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

Flashing

The board is configured to be flashed using west STM32CubeProgrammer runner, so its installation is required.

Alternatively, OpenOCD, JLink, or pyOCD can also be used to flash the board using the --runner (or -r) option:

$ west flash --runner openocd
$ west flash --runner pyocd
$ west flash --runner jlink

For pyOCD, additional target information needs to be installed which can be done by executing the following commands:

$ pyocd pack --update
$ pyocd pack --install stm32h5

Flashing an application to Nucleo H533RE

Connect the Nucleo H533RE to your host computer using the USB port. Then build and flash an application. Here is an example for the Hello World application.

Run a serial host program to connect with your Nucleo board:

$ minicom -D /dev/ttyACM0

Then build and flash the application.

# From the root of the zephyr repository
west build -b nucleo_h533re samples/hello_world
west flash

You should see the following message on the console:

Hello World! nucleo_h533re

Debugging

You can debug an application in the usual way. Here is an example for the Blinky application.

# From the root of the zephyr repository
west build -b nucleo_h533re samples/basic/blinky
west debug