Nucleo L552ZE Q

Overview

The Nucleo L552ZE Q board, featuring an ARM Cortex-M33 based STM32L552ZE MCU, provides an affordable and flexible way for users to try out new concepts and build prototypes by choosing from the various combinations of performance and power consumption features. Here are some highlights of the Nucleo L552ZE Q board:

STM32L552ZE microcontroller in LQFP144 package
Two types of extension resources:
- Arduino Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
On-board ST-LINK/V2-1 debugger/programmer with SWD connector
Flexible board power supply:
- USB VBUS or external source(3.3V, 5V, 7 - 12V)
- ST-Link
Three LEDs: USB communication (LD1), user LED (LD2), power LED (LD3)
Two push-buttons: USER and RESET
External or internal SMPS to generate Vcore logic supply
USB OTG full speed or device only

More information about the board can be found at the Nucleo L552ZE Q website.

Hardware

The STM32L552xx devices are an ultra-low-power microcontrollers family (STM32L5 Series) based on the high-performance Arm|reg| Cortex|reg|-M33 32-bit RISC core. They operate at a frequency of up to 110 MHz.

Ultra-low-power with FlexPowerControl (down to 108 nA Standby mode and 62 uA/MHz run mode)
Core: ARM® 32-bit Cortex® -M33 CPU with TrustZone® and FPU.
Performance benchmark:
- 1.5 DMPIS/MHz (Drystone 2.1)
- 442 CoreMark® (4.02 CoreMark® /MHZ)
Security
- Arm® TrustZone® and securable I/Os memories and peripherals
- Flexible life cycle scheme with RDP (readout protection)
- Root of trust thanks to unique boot entry and hide protection area (HDP)
- Secure Firmware Installation thanks to embedded Root Secure Services
- Secure Firmware Update support with TF-M
- HASH hardware accelerator
- Active tamper and protection temperature, voltage and frequency attacks
- True Random Number Generator NIST SP800-90B compliant
- 96-bit unique ID
- 512-byte One-Time Programmable for user data
Clock management:
- 4 to 48 MHz crystal oscillator
- 32 kHz crystal oscillator for RTC (LSE)
- Internal 16 MHz factory-trimmed RC ( ±1%)
- Internal low-power 32 kHz RC ( ±5%)
- Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by LSE (better than ±0.25 % accuracy)
- 3 PLLs for system clock, USB, audio, ADC
Power management
- Embedded regulator (LDO) with three configurable range output to supply the digital circuitry
- Embedded SMPS step-down converter
- External SMPS support
RTC with HW calendar, alarms and calibration
Up to 114 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V
Up to 22 capacitive sensing channels: support touchkey, linear and rotary touch sensors
Up to 16 timers and 2 watchdogs
- 2x 16-bit advanced motor-control
- 2x 32-bit and 5x 16-bit general purpose
- 2x 16-bit basic
- 3x low-power 16-bit timers (available in Stop mode)
- 2x watchdogs
- 2x SysTick timer
Memories
- Up to 512 MB Flash, 2 banks read-while-write
- 512 KB of SRAM including 64 KB with hardware parity check
- External memory interface for static memories supporting SRAM, PSRAM, NOR, NAND and FRAM memories
- OCTOSPI memory interface
Rich analog peripherals (independent supply)
- 3x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200 uA/MSPS
- 2x 12-bit DAC, low-power sample and hold
- 2x operational amplifiers with built-in PGA
- 2x ultra-low-power comparators
- 4x digital filters for sigma delta modulator
19x communication interfaces
- USB Type-C / USB power delivery controller
- 2.0 full-speed crystal less solution, LPM and BCD
- 2x SAIs (serial audio interface)
- 4x I2C FM+(1 Mbit/s), SMBus/PMBus
- 6x USARTs (ISO 7816, LIN, IrDA, modem)
- 3x SPIs (7x SPIs with USART and OCTOSPI in SPI mode)
- 1xFDCAN
- 1xSDMMC interface
- 2x 14 channel DMA controllers
CRC calculation unit
Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™

More information about STM32L552ZE can be found here:

Supported Features

The nucleo_l552ze_q board supports the hardware features listed below.

on-chip / on-board: Feature integrated in the SoC / present on the board.
2 / 2: Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo: Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

nucleo_l552ze_q

/

Type	Location	Description	Compatible
CPU	on-chip	ARM Cortex-M33 CPU1	`arm,cortex-m33`
ADC	on-chip	STM32 ADC1 1	`st,stm32-adc`
Clock control	on-chip	STM32 RCC (Reset and Clock controller)1	`st,stm32-rcc`
	on-chip	STM32 HSE Clock1	`st,stm32-hse-clock`
	on-chip	Generic fixed-rate clock provider1 2	`fixed-clock`
	on-chip	STM32 MSI Clock1	`st,stm32-msi-clock`
	on-chip	STM32 LSE Clock1	`st,stm32-lse-clock`
	on-chip	STM32L4/L5 main PLL1	`st,stm32l4-pll-clock`
Counter	on-chip	STM32 counters7	`st,stm32-counter`
DAC	on-chip	STM32 family DAC1	`st,stm32-dac`
DMA	on-chip	STM32 DMA controller (V2)2	`st,stm32-dma-v2`
DMA	on-chip	STM32 DMAMUX controller1	`st,stm32-dmamux`
Flash controller	on-chip	STM32 Family flash controller1	`st,stm32-flash-controller`
GPIO & Headers	on-chip	STM32 GPIO Controller8	`st,stm32-gpio`
GPIO & Headers	on-board	GPIO pins exposed on Arduino Uno (R3) headers1	`arduino-header-r3`
I2C	on-chip	STM32 I2C V2 controller2	`st,stm32-i2c-v2`
Input	on-board	Group of GPIO-bound input keys1	`gpio-keys`
Interrupt controller	on-chip	ARMv8-M NVIC (Nested Vectored Interrupt Controller)1	`arm,v8m-nvic`
Interrupt controller	on-chip	STM32G0 External Interrupt Controller1	`st,stm32g0-exti`
LED	on-board	Group of GPIO-controlled LEDs1	`gpio-leds`
Memory controller	on-chip	STM32 Flexible Memory Controller (FMC)1	`st,stm32-fmc`
MMC	on-chip	STM32 SDMMC Disk Access1	`st,stm32-sdmmc`
MMU / MPU	on-chip	ARMv8-M MPU (Memory Protection Unit)1	`arm,armv8m-mpu`
MTD	on-chip	STM32 flash memory1	`st,stm32-nv-flash`
OCTOSPI	on-chip	STM32 OSPI Controller1	`st,stm32-ospi`
PHY	on-chip	This binding is to be used by all the usb transceivers which are built-in with USB IP1	`usb-nop-xceiv`
Pin control	on-chip	STM32 Pin controller1	`st,stm32-pinctrl`
PWM	on-chip	STM32 PWM9	`st,stm32-pwm`
Reset controller	on-chip	STM32 Reset and Clock Control (RCC) Controller1	`st,stm32-rcc-rctl`
RNG	on-chip	STM32 Random Number Generator1	`st,stm32-rng`
RTC	on-chip	STM32 RTC1	`st,stm32-rtc`
Sensors	on-chip	STM32 family TEMP node for production calibrated sensors with two calibration temperatures1	`st,stm32-temp-cal`
	on-chip	STM32 VREF+1	`st,stm32-vref`
	on-chip	STM32 VBAT1	`st,stm32-vbat`
Serial controller	on-chip	STM32 USART1 2	`st,stm32-usart`
	on-chip	STM32 UART2	`st,stm32-uart`
	on-chip	STM32 LPUART1	`st,stm32-lpuart`
SMbus	on-chip	STM32 SMBus controller2	`st,stm32-smbus`
SPI	on-chip	STM32 SPI controller with embedded Rx and Tx FIFOs1 2	`st,stm32-spi-fifo`
SRAM	on-chip	Generic on-chip SRAM description1	`mmio-sram`
USB Type-C Port Controller	on-chip	STM32 USB Type-C / Power Delivery1	`st,stm32-ucpd`
Timer	on-chip	ARMv8-M System Tick1	`arm,armv8m-systick`
	on-chip	STM32 low-power timer (LPTIM)1	`st,stm32-lptim`
	on-chip	STM32 timers9	`st,stm32-timers`
USB	on-chip	STM32 USB controller1	`st,stm32-usb`
Watchdog	on-chip	STM32 watchdog1	`st,stm32-watchdog`
Watchdog	on-chip	STM32 system window watchdog1	`st,stm32-window-watchdog`

Zephyr board options

The STM32L552e is an SoC with Cortex-M33 architecture. Zephyr provides support for building for both Secure and Non-Secure firmware.

The BOARD options are summarized below:

BOARD	Description
nucleo_l552ze_q	For building Trust Zone Disabled firmware
nucleo_l552ze_q/stm32l552xx/ns	For building Non-Secure firmware

Here are the instructions to build Zephyr with a non-secure configuration, using TF-M IPC sample:

$ west build -b nucleo_l552ze_q/stm32l552xx/ns samples/tfm_integration/tfm_ipc/

Once done, before flashing, you need to first run a generated script that will set platform option bytes config and erase platform (among others, option bit TZEN will be set).

$ ./build/tfm/api_ns/regression.sh
$ west flash

Please note that, after having run a TFM sample on the board, you will need to run ./build/tfm/api_ns/regression.sh once more to clean up the board from secure options and get back the platform back to a “normal” state and be able to run usual, non-TFM, binaries. Also note that, even then, TZEN will remain set, and you will need to use STM32CubeProgrammer to disable it fully, if required.

Connections and IOs

Nucleo L552ZE Q Board has 8 GPIO controllers. These controllers are responsible for pin muxing, input/output, pull-up, etc.

Available pins:

For more details please refer to STM32 Nucleo-144 board User Manual.

Default Zephyr Peripheral Mapping:

UART_1_TX : PA9
UART_1_RX : PA10
UART_2_TX : PA2
UART_2_RX : PA3
UART_3_TX : PD8
UART_3_RX : PD9
I2C_1_SCL : PB6
I2C_1_SDA : PB7
SPI_1_NSS : PA4
SPI_1_SCK : PA5
SPI_1_MISO : PA6
SPI_1_MOSI : PA7
SPI_2_NSS : PB12
SPI_2_SCK : PB13
SPI_2_MISO : PB14
SPI_2_MOSI : PB15
SPI_3_NSS : PB12
SPI_3_SCK : PC10
SPI_3_MISO : PC11
SPI_3_MOSI : PC12
PWM_2_CH1 : PA0
USER_PB : PC13
LD2 : PB7
DAC1 : PA4
ADC1 : PC0

System Clock

Nucleo L552ZE Q System Clock could be driven by internal or external oscillator, as well as main PLL clock. By default System clock is driven by PLL clock at 110MHz, driven by 4MHz medium speed internal oscillator.

Serial Port

Nucleo L552ZE Q board has 6 U(S)ARTs. The Zephyr console output is assigned to UART2. Default settings are 115200 8N1.

Programming and Debugging

Nucleo L552ZE Q board includes an ST-LINK/V2-1 embedded debug tool interface.

Applications for the nucleo_l552ze_q board configuration can be built and flashed in the usual way (see Building an Application and Run an Application for more details).

Flashing

The board is configured to be flashed using west STM32CubeProgrammer runner, so its installation is required.

Alternatively, OpenOCD or pyOCD can also be used to flash the board using the --runner (or -r) option:

$ west flash --runner openocd
$ west flash --runner pyocd

Support can be enabled for pyOCD by adding “pack” support with the following pyOCD commands:

$ pyocd pack --update
$ pyocd pack --install stm32l552ze

Flashing an application to Nucleo L552ZE Q

Connect the Nucleo L552ZE Q to your host computer using the USB port. Then build and flash an application. Here is an example for the Hello World application.

Run a serial host program to connect with your Nucleo board:

$ minicom -D /dev/ttyACM0

Then build and flash the application.

# From the root of the zephyr repository
west build -b nucleo_l552ze_q samples/hello_world
west flash

You should see the following message on the console:

Hello World! arm

Debugging

You can debug an application in the usual way. Here is an example for the Hello World application.

# From the root of the zephyr repository
west build -b nucleo_l552ze_q samples/hello_world
west debug

Nucleo L552ZE Q

Overview

Hardware

Supported Features

`nucleo_l552ze_q/stm32l552xx` target

`nucleo_l552ze_q/stm32l552xx/ns` target

Zephyr board options

Connections and IOs

Available pins:

Default Zephyr Peripheral Mapping:

System Clock

Serial Port

Programming and Debugging

Flashing

Flashing an application to Nucleo L552ZE Q

Debugging

Nucleo L552ZE Q

Overview

Hardware

Supported Features

nucleo_l552ze_q/stm32l552xx target

nucleo_l552ze_q/stm32l552xx/ns target

Zephyr board options

Connections and IOs

Available pins:

Default Zephyr Peripheral Mapping:

System Clock

Serial Port

Programming and Debugging

Flashing

Flashing an application to Nucleo L552ZE Q

Debugging

`nucleo_l552ze_q/stm32l552xx` target

`nucleo_l552ze_q/stm32l552xx/ns` target