nxp,dai-sai

Vendor: NXP Semiconductors

Note

An implementation of a driver matching this compatible is available in drivers/dai/nxp/sai/sai.c.

Description

NXP Synchronous Audio Interface (SAI) node

Below you may find some configuration examples:

1) Configuring SAI1 for i.MX8QM MEK board

#include <zephyr/dt-bindings/clock/imx_ccm.h>

dai@59050000 {
  compatible = "nxp,dai-sai";
  reg = <0x59050000 DT_SIZE_K(64)>;
  interrupt-parent = <&master5>;
  interrupts = <28>;
  clocks = <&ccm IMX_CCM_SAI1_CLK 0x0 0x0>;
  clock-names = "bus";
  dai-index = <1>;
  dmas = <&edma0 15 0>, <&edma0 14 0>;
  dma-names = "tx", "rx";
  rx-fifo-watermark = <48>;
  tx-fifo-watermark = <2>;
  fifo-depth = <48>;
  rx-sync-mode = <1>;
};

2) Configuring SAI6 for i.MX8ULP EVK9 board

dai@2da90000 {
  compatible = "nxp,dai-sai";
  reg = <0x2da90000 DT_SIZE_K(4)>;
  interrupt-parent = <&clic>;
  interrupts = <24 0 0>;
  dmas = <&edma2 0 72>, <&edma2 1 71>;
  dma-names = "tx", "rx";
  dai-index = <6>;
  rx-fifo-watermark = <8>;
  tx-fifo-watermark = <1>;
  fifo-depth = <8>;
  rx-sync-mode = <1>;
  tx-dataline = <2>;
};

Properties

Properties not inherited from the base binding file.

Name

Type

Details

mclk-is-output

boolean

MCLK is configured as output.

rx-fifo-watermark

int

Watermark value (in FIFO words) of RX FIFO.

tx-fifo-watermark

int

Watermark value (in FIFO words) of TX FIFO.

fifo-depth

int

Size (in FIFO words) of the TX/RX FIFO.

dai-index

int

Index of the DAI instance. Must match Linux side.

tx-sync-mode

int

Transmitter synchronization mode.

0: transmitter is ASYNC to receiver
1: transmitter is SYNC with receiver

Legal values: 0, 1

rx-sync-mode

int

Receiver synchronization mode.

0: receiver is ASYNC to transmitter
1: receiver is SYNC with transmitter

Legal values: 0, 1

tx-dataline

int

Index of the data line to transmit data on in multiline SAI instances.

rx-dataline

int

Index of the data line to receive data on in multiline SAI instances.

pinctrl-0

phandles

Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

pinctrl-1

phandles

Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

Pin configuration/s for the fifth state. See pinctrl-0.

pinctrl-names

string-array

Names for the provided states. The number of names needs to match the
number of states.