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sitronix,st7796s (on mipi-dbi bus)

Vendor: Sitronix Technology Corporation

Description

ST7796S Display controller

Properties

Properties not inherited from the base binding file.

Name

Type

Details

supply-gpios

phandle-array

GPIO specifier that controls power to the device.

This property should be provided when the device has a dedicated
switch that controls power to the device.  The supply state is
entirely the responsibility of the device driver.

Contrast with vin-supply.

vin-supply

phandle

Reference to the regulator that controls power to the device.
The referenced devicetree node must have a regulator compatible.

This property should be provided when device power is supplied
by a shared regulator.  The supply state is dependent on the
request status of all devices fed by the regulator.

Contrast with supply-gpios.  If both properties are provided
then the regulator must be requested before the supply GPIOS is
set to an active state, and the supply GPIOS must be set to an
inactive state before releasing the regulator.

mipi-max-frequency

int

Maximum clock frequency of device's MIPI interface in Hz

mipi-mode

int

MIPI DBI mode in use. Use the macros, not the actual enum value. Here is
the concordance list (see dt-bindings/mipi_dbi/mipi_dbi.h)
  1     MIPI_DBI_MODE_SPI_3WIRE
  2     MIPI_DBI_MODE_SPI_4WIRE
  3     MIPI_DBI_MODE_6800_BUS_16_BIT
  4     MIPI_DBI_MODE_6800_BUS_9_BIT
  5     MIPI_DBI_MODE_6800_BUS_8_BIT
  6     MIPI_DBI_MODE_8080_BUS_16_BIT
  7     MIPI_DBI_MODE_8080_BUS_9_BIT
  8     MIPI_DBI_MODE_8080_BUS_8_BIT

Legal values: 1, 2, 3, 4, 5, 6, 7, 8

duplex

int

SPI Duplex mode, full or half. By default it's always full duplex thus 0
as this is, by far, the most common mode.
Selecting half duplex allows to use SPI MOSI as a bidirectional line,
typically used when only one data line is connected.
Use the macros not the actual enum value, here is the concordance
list (see dt-bindings/spi/spi.h)
  0    SPI_FULL_DUPLEX
  2048 SPI_HALF_DUPLEX

mipi-cpol

boolean

SPI clock polarity which indicates the clock idle state.
If it is used, the clock idle state is logic high; otherwise, low.

mipi-cpha

boolean

SPI clock phase that indicates on which edge data is sampled.
If it is used, data is sampled on the second edge; otherwise, on the first edge.

mipi-hold-cs

boolean

In some cases, it is necessary for the master to manage SPI chip select
under software control, so that multiple spi transactions can be performed
without releasing it. A typical use case is variable length SPI packets
where the first spi transaction reads the length and the second spi transaction
reads length bytes.

height

int

Height of the panel driven by the controller, with the units in pixels.

This property is required.

width

int

Width of the panel driven by the controller, with the units in pixels.

This property is required.

frmctl1

uint8-array

Frame rate control (partial mode / full colors). The default value should
result in a framerate of ~41 FPS.

Default value: [160, 16]

frmctl2

uint8-array

Frame rate control (idle mode / 8 colors). This property sets the
division ratio for internal clocks in idle mode

Default value: [0, 16]

frmctl3

uint8-array

Frame rate control (partial mode / full colors). This property sets the
division ratio for internal clocks in partial mode

Default value: [0, 16]

bpc

uint8-array

Blanking porch control. This sets the vertical and horizontal
front/back porch values

Default value: [2, 2, 0, 4]

dfc

uint8-array

Display function control. Sets display graphical ram mode, as well as
gate scan mode

Default value: [128, 2, 59]

pwr1

uint8-array

Power control parameter 1. Sets AVDDS, AVLCS, and VGHS

Default value: [128, 37]

pwr2

int

Power control parameter 2. Sets VAP

Default value: 19

pwr3

int

Power control parameter 3. Sets source and gamma current levels

Default value: 10

vcmpctl

int

VCOM control setting. Value starts at 0.300V, and moves upwards in
increments of 0.025V. Maximum of 1.875V

Default value: 28

doca

uint8-array

Display output control adjust. Sets display timing controls

Default value: [64, 138, 0, 0, 37, 10, 56, 51]

pgc

uint8-array

Positive gamma control settings. No default is provided by controller,
as this setting is panel specific.

This property is required.

ngc

uint8-array

Negative gamma control settings. No default is provided by controller,
as this setting is panel specific.

This property is required.

madctl

int

Memory data access control value. This controls the panel color format,
as well as rotation settings.

color-invert

boolean

When present, inverts display colors

invert-mode

string

Display inversion control mode.

Default value: 1-dot

Legal values: 'column', '1-dot', '2-dot'

rgb-is-inverted

boolean

Inverting color format order (RGB->BGR or BGR->RGB)
In the case of enabling this option, API reports pixel-format in capabilities
as the inverted value of the RGB pixel-format specified in MADCTL.
This option is convenient for supporting displays with bugs
where the actual color is different from the pixel format of MADCTL.