xlnx,axi-dma-1.00.a
Vendor: Xilinx
Note
An implementation of a driver matching this compatible is available in drivers/dma/dma_xilinx_axi_dma.c.
Description
These nodes are “dma” bus nodes.
Xilinx AXI DMA LogiCORE IP controller with compatibility string
generated for use of the DMA outside of the AXI Ethernet subsystem.
Properties
Properties not inherited from the base binding file.
Name |
Type |
Details |
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DMA address width (64 or 32 bit)
This property is required. Legal values: |
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Handle to connected node, e.g., AXI Ethernet controller.
The axistream-connected and axistream-control-connected properties can easily cause circular
dependencies, if they are provided at the second device as well.
In this case, the python device tree script fails to assign ordinals, causing build failure.
I suggest you do not provide them at the DMA.
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Handle to connected control node, e.g., AXI Ethernet controller
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Data realignment engine activated. This enables unaligned DMA transfers.
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Number of queues per channel.
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Number of items to expect in a DMA specifier
This property is required. |
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Bitmask of available DMA channels in ascending order that are
not reserved by firmware and are available to the
kernel. i.e. first channel corresponds to LSB.
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Number of DMA channels supported by the controller
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Number of DMA request signals supported by the controller.
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Memory address alignment requirement for DMA buffers used by the controller.
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Memory size alignment requirement for DMA buffers used by the controller.
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Minimal chunk of data possible to be copied by the controller.
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Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “xlnx,axi-dma-1.00.a” compatible.
Name |
Type |
Details |
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DMA Control registers
This property is required. See Important properties for more information. |
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TX IRQ number followed by RX IRQ number
This property is required. See Important properties for more information. |
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Interrupt controller that the DMA is connected to
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Clock gate information
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indicates the operational status of a device
Legal values: See Important properties for more information. |
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compatible strings
This property is required. See Important properties for more information. |
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name of each register space
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extended interrupt specifier for device
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name of each interrupt
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No description provided for this label
See Important properties for more information. |
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name of each clock
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number of address cells in reg property
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number of size cells in reg property
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DMA channels specifiers
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Provided names of DMA channel specifiers
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IO channels specifiers
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Provided names of IO channel specifiers
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mailbox / IPM channels specifiers
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Provided names of mailbox / IPM channel specifiers
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Power domain specifiers
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Provided names of power domain specifiers
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Number of cells in power-domains property
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Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Automatically configure the device for runtime power management after the
init function runs.
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List of power states that will disable this device power.
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