davicom,dm8806-phy (on mdio bus)
Vendor: DAVICOM Semiconductor, Inc.
Note
An implementation of a driver matching this compatible is available in drivers/ethernet/phy/phy_dm8806.c.
Description
Davicom DM8806 Ethernet MAC and PHY with RMII interface
Properties
Properties not inherited from the base binding file.
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Details |
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5-bit PHY address for Switch Per-Port Registers group of Davicom DM8806
MAC PHY Ethernet Switch Controller, separate for each MAC PHY, build in
DM8806 and correlate with Ethenet port. DM8806 has five MAC PHY inside,
but it is not mandatory to define all of them in device tree if there is
no need to communicate with all of them. Each MAC PHY has its own PHY
address, which together with Register address creates the absolute address
of the concrete register in conrete MAC PHY acoring to Clause 22 MDIO
communication standard. Below example shows how the PHY address and
Register address are glued together in Switch Per-Port Registers group:
Switch Per-Port Registers
Port0: (5bit PHY Address) + (5bit Register address) = Absolute address
Absolute address is the address of the concrete register in MAC PHY0
which is responsible for Ethernet Port0 in Davicom DM8806
This property is required. |
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GPIO connected to MAC PHY reset signal pin. Reset is active low.
This property is required. |
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GPIO for upt signal indicating MAC PHY state change.
This property is required. |
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Which type of phy connection the mac phy is set up for
This property is required. Legal values: |
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Do not reset the PHY during initialization
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This link is fixed and does not require PHY configuration
Legal values: |
Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “davicom,dm8806-phy” compatible.
Name |
Type |
Details |
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5-bit PHY address for Internal PHY Registers group of Davicom DM8806 MAC
PHY Ethernet Switch Controller, separate for each MAC PHY, build in DM8806
and correlate with Ethenet port. DM8806 has five MAC PHY inside, but it is
not mandatory to define all of them in device tree if there is no need to
communicate with all of them. Each MAC PHY has its own PHY address, which
together with Register address creates the absolute address of the
concrete register in conrete MAC PHY acoring to Clause 22 MDIO
communication standard. Below example shows how the PHY address and
Register address are glued together in Internal PHY Registers group:
Internal PHY Registers
Port0: (5-bit PHY Address) + (5-bit Register address) = Absolute address
Absolute address is the address of the concrete register in MAC PHY0
which is responsible for Ethernet Port0 in Davicom DM8806
This property is required. See Important properties for more information. |
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Indicates the operational status of the hardware or other
resource that the node represents. In particular:
- "okay" means the resource is operational and, for example,
can be used by device drivers
- "disabled" means the resource is not operational and the system
should treat it as if it is not present
For details, see "2.3.4 status" in Devicetree Specification v0.4.
Legal values: See Important properties for more information. |
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This property is a list of strings that essentially define what
type of hardware or other resource this devicetree node
represents. Each device driver checks for specific compatible
property values to find the devicetree nodes that represent
resources that the driver should manage.
The recommended format is "vendor,device", The "vendor" part is
an abbreviated name of the vendor. The "device" is usually from
the datasheet.
The compatible property can have multiple values, ordered from
most- to least-specific. Having additional values is useful when the
device is a specific instance of a more general family, to allow the
system to match the most specific driver available.
For details, see "2.3.1 compatible" in Devicetree Specification v0.4.
This property is required. See Important properties for more information. |
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Optional names given to each register block in the "reg" property.
For example:
/ {
soc {
#address-cells = <1>;
#size-cells = <1>;
uart@1000 {
reg = <0x1000 0x2000>, <0x3000 0x4000>;
reg-names = "foo", "bar";
};
};
};
The uart@1000 node has two register blocks:
- one with base address 0x1000, size 0x2000, and name "foo"
- another with base address 0x3000, size 0x4000, and name "bar"
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Information about interrupts generated by the device, encoded as an array
of one or more interrupt specifiers. The format of the data in this property
varies by where the device appears in the interrupt tree. Devices with the same
"interrupt-parent" will use the same format in their interrupts properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
See Important properties for more information. |
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Extended interrupt specifier for device, used as an alternative to
the "interrupts" property.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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Optional names given to each interrupt generated by a device.
The interrupts themselves are defined in either "interrupts" or
"interrupts-extended" properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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If present, this refers to the node which handles interrupts generated
by this device.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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Human readable string describing the device. Use of this property is
deprecated except as needed on a case-by-case basis.
For details, see "4.1.2 Miscellaneous Properties" in Devicetree
Specification v0.4.
See Important properties for more information. |
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Information about the device's clock providers. In general, this property
should follow conventions established in the dt-schema binding:
https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/clock/clock.yaml
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Optional names given to each clock provider in the "clocks" property.
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This property encodes the number of <u32> cells used by address fields
in "reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
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This property encodes the number of <u32> cells used by size fields in
"reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
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DMA channel specifiers relevant to the device.
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Optional names given to the DMA channel specifiers in the "dmas" property.
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IO channel specifiers relevant to the device.
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Optional names given to the IO channel specifiers in the "io-channels" property.
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Mailbox / IPM channel specifiers relevant to the device.
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Optional names given to the mbox specifiers in the "mboxes" property.
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Power domain specifiers relevant to the device.
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Optional names given to the power domain specifiers in the "power-domains" property.
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Number of cells in power-domains property
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Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Automatically configure the device for runtime power management after the
init function runs.
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List of power states that will disable this device power.
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