st,stm32-xspi-psram

Vendor: STMicroelectronics

Note

An implementation of a driver matching this compatible is available in drivers/memc/memc_stm32_xspi_psram.c.

Description

STM32 XSPI PSRAM.

Properties

Properties not inherited from the base binding file.

Name

Type

Details

fixed-latency

boolean

Read latency type: variable if not set, fixed if set.

read-latency

int

Read latency code
- 0: LCx2 3 / Fmax 66 MHz
- 1: LCx2 4 / Fmax 109 MHz
- 2: LCx2 5 / Fmax 133 MHz
- 3: LCx2 6 / Fmax 166 MHz
- 4: LCx2 7 / Fmax 200 MHz

Default value: 2

Legal values: 0, 1, 2, 3, 4

drive-strength

int

Drive strength code:
- 0: Full
- 1: Half
- 2: 1/4
- 3: 1/8

Legal values: 0, 1, 2, 3

write-latency

int

Write latency code:
- 0: WLC 3 / Fmax 66 MHz
- 4: WLC 4 / Fmax 109 MHz
- 2: WLC 5 / Fmax 133 MHz
- 5: WLC 6 / Fmax 166 MHz
- 1: WLC 7 / Fmax 200 MHz

Default value: 2

Legal values: 0, 1, 2, 4, 5

refresh-rate

int

- 0: Always 4x refresh
- 1: Enables 1x refesh when temperature allows
- 3: Enables 0.5x refresh when temperature allows

Legal values: 0, 1, 3

pasr

int

Refresh coverage:
- 0: Full array
- 1: Bottom 1/2 array
- 2: Bottom 1/4 array
- 3: Bottom 1/8 array
- 4: None
- 5: Top 1/2 array
- 6: Top 1/4 array
- 7: Top 1/8 array

Legal values: 0, 1, 2, 3, 4, 5, 6, 7

io-x16-mode

boolean

Mode is x8 if not set, and x16 if set.

rbx

boolean

If not enabled, reads stay within page (row) boundary.
If enabled, allows reads cross page (row) boundary.

burst-length

int

Burst length:
0: 16 Byte/Word Wrap
1: 32 Byte/Word Wrap
2: 64 Byte/Word Wrap
3: 2K Byte/1K Word Wrap

Default value: 1

Legal values: 0, 1, 2, 3

burst-type-hybrid-wrap

boolean

If not enabled, burst-length sets the burst address space in which the
device will continually wrap within.
If enabled, the device will burst through the initial wrapped burst length
once, then continue to burst incrementally up to maximum column address
(2K in X8 mode/1K in X16 mode) before wrapping around within the entire
column address space