gd,gd32-rcu

Description

Gigadevice RCU (Reset and Clock Unit)

Gigadevice Reset and Clock Unit (RCU) if a multi-function peripheral in
charge of reset control (RCTL) and clock control (CCTL) for all SoC
peripherals. Child nodes are used to represent each functional block.

Properties

Properties not inherited from the base binding file.

Name

Type

Details

gd,ck48m-source

string

Select the CK48M clock source. CK48M is used by TRNG/SDIO/USBFS/USBHS.
When set to "irc48m", the SoC initialization code enables the IRC48M
oscillator and selects it as CK48M source.
When set to "pll48m", the SoC initialization code selects PLL48M as CK48M
source (see gd,pll48m-source).

Legal values: irc48m, pll48m

gd,pll48m-source

string

Select the PLL48M source (CK_PLLQ or CK_PLLSAIP) when gd,ck48m-source is
set to "pll48m". This does not configure PLL/PLLSAI parameters; board
clock configuration must ensure the selected source provides a valid
48MHz clock domain.

Default value: pllq

Legal values: pllq, pllsaip