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nxp,lpc11u6x-pinctrl

Vendor: NXP Semiconductors

Description

LPC pinctrl node. This node defines pin configurations in pin groups, and has
the 'pinctrl' node identifier in the SOC's devicetree. Each group within the
pin configuration defines a peripheral's pin configuration. Each numbered
subgroup represents pins with shared configuration for that peripheral. The
'pinmux' property of each group selects the pins to be configured with these
properties. For example, here is a configuration for FLEXCOMM0 pins:

pinmux_flexcomm0_usart: pinmux_flexcomm0_usart {
  group0 {
    pinmux = <FC0_TXD_SCL_MISO_WS_PIO0_30>,
            <FC0_RXD_SDA_MOSI_DATA_PIO0_29>;
    slew-rate = "standard";
  };
};

If only the required properties are supplied, the ICON_PIO register will
be assigned the following values:
IOCON_FUNC=<pin mux selection>,
IOCON_MODE=0,
IOCON_SLEW=<slew-rate selection>,
IOCON_INVERT=0,
IOCON_DIGIMODE=1,
IOCON_OD=0,

Values for I2C type and analog type pins have the following defaults:
IOCON_ASW=0
IOCON_SSEL=0
IOCON_FILTEROFF=1
IOCON_ECS=0
IOCON_EGP=1
IOCON_I2CFILTER=1

Note the inherited pinctrl properties defined below have the following effects:
drive-open-drain: IOCON_OD=1
bias-pull-up: IOCON_MODE=2
bias-pull-down: IOCON_MODE=1
drive-push-pull: IOCON_MODE=3

Note: for the LPC11u6x, the following fields are also supported:
IOCON_HYS- set by input-schmitt-enable
IOCON_S_MODE- set by nxp,digital-filter
IOCON_CLKDIV- set by nxp,filter-clock-div
IOCON_FILTR- set by nxp,analog-filter

Properties

Top level properties

These property descriptions apply to “nxp,lpc11u6x-pinctrl” nodes themselves. This page also describes child node properties in the following sections.

Properties not inherited from the base binding file.

(None)

Grandchild node properties

Name

Type

Details

nxp,digital-filter

int

Enable digital filter. Set number of clock cycles to use as rejection
threshold for input pulses. 0 disables the filter. Only valid for
lpc11u6x SOC. Filter defaults to disabled, as this is default reset
value for SOC

Legal values: 0, 1, 2, 3

nxp,filter-clock-div

int

set peripheral clock divider for input filter sampling clock
IOCONCLKDIV. Only valid for lpc11u6x SOC. Default to 0, as this
is the default reset value for the SOC.

Legal values: 0, 1, 2, 3, 4, 5, 6

nxp,disable-analog-filter

boolean

Disable fixed 10 ns input glitch analog filter. Only valid for lpc11u6x
SOC, on analog pins. Note that this filter is enabled on reset, hence
the choice to make disabling the filter opt-in

pinmux

array

Pin mux selection for this group. See the SOC level pinctrl header
file in NXP's HAL for a defined list of these options.

This property is required.

nxp,invert

boolean

Invert the pin input logic level

nxp,analog-mode

boolean

Set the pin to analog mode. Sets DIGIMODE=0, and ASW=1. Only valid for
analog type pins.

nxp,i2c-filter

string

I2C glitch filter speed. Only valid for I2C mode pins. Fast mode
typically only required for High speed I2C.

Legal values: 'slow', 'fast'

nxp,i2c-mode

boolean

Enable I2C mode for a pin. If not present, pin is in GPIO mode. Only
valid for I2C mode pins

bias-pull-up

boolean

enable pull-up resistor

bias-pull-down

boolean

enable pull-down resistor

drive-push-pull

boolean

drive actively high and low

drive-open-drain

boolean

drive with open drain (hardware AND)

input-schmitt-enable

boolean

enable schmitt-trigger mode