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nxp,fs26-wdog (on spi bus)

Vendor: NXP Semiconductors


FS26 System Basis Chip (SBC) watchdog driver.

The FS26 features multiple voltage regulators to supply the microcontroller,
peripheral ICs and communication interfaces. The FS26 also offers various
functionalities for system control and monitoring, including a configurable
watchdog counter to ensure the microcontroller is able to communicate with the
FS26, which can react to any failure condition and place the system in a safe
state. This driver covers only the watchdog functionality of FS26. The rest
of the functionalities are not implemented.

The FS26 uses a 32-bit SPI interface. The MCU is the primary driving MOSI and
FS26 is the secondary driving MISO. Therefore the FS26 devicetree node must be
in a SPI bus. For example, if FS26 is connected to spi3 bus, on Chip Select 0:

  &spi3 {
    // here there should be spi3 properties as needed
    status = "okay";

    fs26_wdt: watchdog@0 {
      compatible = "nxp,fs26-wdog";
      reg = <0>;
      spi-max-frequency = <DT_FREQ_M(5)>;
      type = "challenger";
      int-gpios = <&gpioa_h 3 GPIO_ACTIVE_LOW>;
      status = "okay";

When an FS26 internal interrupt occurs, the INTB pin generates a pulse to
inform the microcontroller. The driver masks all interrupt sources except for
bad watchdog refresh (BAD_WD_M). The GPIO pin where the interrupt signal is
received must be configured from devicetree. In the example above, this is
indicated through int-gpios property. It is also required to configure the
external interrupt controller to receive interrupts on this pin.


Properties not inherited from the base binding file.






GPIO specifier that controls power to the device.

This property should be provided when the device has a dedicated
switch that controls power to the device.  The supply state is
entirely the responsibility of the device driver.

Contrast with vin-supply.



Reference to the regulator that controls power to the device.
The referenced devicetree node must have a regulator compatible.

This property should be provided when device power is supplied
by a shared regulator.  The supply state is dependent on the
request status of all devices fed by the regulator.

Contrast with supply-gpios.  If both properties are provided
then the regulator must be requested before the supply GPIOS is
set to an active state, and the supply GPIOS must be set to an
inactive state before releasing the regulator.



Maximum clock frequency of device's SPI interface in Hz

This property is required.



Duplex mode, full or half. By default it's always full duplex thus 0
as this is, by far, the most common mode.
Use the macros not the actual enum value, here is the concordance
list (see dt-bindings/spi/spi.h)

Legal values: 0, 2048



Motorola or TI frame format. By default it's always Motorola's,
thus 0 as this is, by far, the most common format.
Use the macros not the actual enum value, here is the concordance
list (see dt-bindings/spi/spi.h)

Legal values: 0, 32768



SPI clock polarity which indicates the clock idle state.
If it is used, the clock idle state is logic high; otherwise, low.



SPI clock phase that indicates on which edge data is sampled.
If it is used, data is sampled on the second edge; otherwise, on the first edge.



In some cases, it is necessary for the master to manage SPI chip select
under software control, so that multiple spi transactions can be performed
without releasing it. A typical use case is variable length SPI packets
where the first spi transaction reads the length and the second spi transaction
reads length bytes.



Watchdog type enabled on this device.

The Challenger watchdog monitoring feature is enabled for ASIL D devices.
This mode is based on a question/answer process with the microcontroller.

The Simple watchdog monitoring feature is enabled for ASIL B devices. This
mode uses a unique seed.

This property is required.

Legal values: 'simple', 'challenger'



GPIO to use to receive external interrupts from INTB signal.

This property is required.