Zephyr API Documentation 4.3.99
A Scalable Open Source RTOS
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amebadplus_clock.h
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1/*
2 * Copyright (c) 2024 Realtek Semiconductor Corp.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_AMEBADPLUS_CLOCK_H_
8#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_AMEBADPLUS_CLOCK_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif
13
18
23
25#define AMEBA_ATIM_CLK 1
26
28#define AMEBA_RTC_CLK 2
29
31
36
38#define AMEBA_PWM0_CLK 3
39
41#define AMEBA_PWM1_CLK 4
42
44#define AMEBA_HTIM0_CLK 5
45
47#define AMEBA_HTIM1_CLK 6
48
50#define AMEBA_LEDC_CLK 7
51
53#define AMEBA_UART0_CLK 8
54
56#define AMEBA_UART1_CLK 9
57
59#define AMEBA_UART2_CLK 10
60
62#define AMEBA_LOGUART_CLK 11
63
65#define AMEBA_DTIM_CLK 12
66
68#define AMEBA_ADC_CLK 13
69
71#define AMEBA_GPIO_CLK 14
72
74#define AMEBA_LTIM0_CLK 15
75
77#define AMEBA_LTIM1_CLK 16
78
80#define AMEBA_LTIM2_CLK 17
81
83#define AMEBA_LTIM3_CLK 18
84
86#define AMEBA_LTIM4_CLK 19
87
89#define AMEBA_LTIM5_CLK 20
90
92#define AMEBA_LTIM6_CLK 21
93
95#define AMEBA_LTIM7_CLK 22
96
98#define AMEBA_PTIM0_CLK 23
99
101#define AMEBA_PTIM1_CLK 24
102
104#define AMEBA_KSCAN_CLK 25
105
107
112
114#define AMEBA_DMAC_CLK 26
115
117#define AMEBA_SDIO_CLK 27
118
120#define AMEBA_SPI0_CLK 28
121
123#define AMEBA_SPI1_CLK 29
124
126#define AMEBA_USB_CLK 30
127
129#define AMEBA_FLASH_CLK 31
130
132#define AMEBA_PSRAM_CLK 32
133
135#define AMEBA_SPORT0_CLK 33
136
138#define AMEBA_SPORT1_CLK 34
139
141#define AMEBA_AC_CLK 35
142
144#define AMEBA_IRDA_CLK 36
145
147#define AMEBA_I2C0_CLK 37
148
150#define AMEBA_I2C1_CLK 38
151
153#define AMEBA_TRNG_CLK 39
154
156
161
163#define AMEBA_BTON_CLK 40
164
166#define AMEBA_AES_CLK 42
167
171#define AMEBA_CLK_MAX 43 /* clk idx max */
172
174
179
188#define AMEBA_NUMERICAL_PERIPH(name, n) \
189 [AMEBA_##name##n##_CLK] = { \
190 .parent = AMEBA_RCC_NO_PARENT, \
191 .cke = APBPeriph_##name##n##_CLOCK, \
192 .fen = APBPeriph_##name##n, \
193 },
194
203#define AMEBA_SINGLE_PERIPH(name) \
204 [AMEBA_##name##_CLK] = { \
205 .parent = AMEBA_RCC_NO_PARENT, \
206 .cke = APBPeriph_##name##_CLOCK, \
207 .fen = APBPeriph_##name, \
208 },
209
213#define AMEBA_LTIM_PERIPHS \
214 AMEBA_NUMERICAL_PERIPH(LTIM, 0) /* AMEBA_LTIM0_CLK */ \
215 AMEBA_NUMERICAL_PERIPH(LTIM, 1) /* AMEBA_LTIM1_CLK */ \
216 AMEBA_NUMERICAL_PERIPH(LTIM, 2) /* AMEBA_LTIM2_CLK */ \
217 AMEBA_NUMERICAL_PERIPH(LTIM, 3) /* AMEBA_LTIM3_CLK */ \
218 AMEBA_NUMERICAL_PERIPH(LTIM, 4) /* AMEBA_LTIM4_CLK */ \
219 AMEBA_NUMERICAL_PERIPH(LTIM, 5) /* AMEBA_LTIM5_CLK */ \
220 AMEBA_NUMERICAL_PERIPH(LTIM, 6) /* AMEBA_LTIM6_CLK */ \
221 AMEBA_NUMERICAL_PERIPH(LTIM, 7) /* AMEBA_LTIM7_CLK */
222
226#define AMEBA_PTIM_PERIPHS \
227 AMEBA_NUMERICAL_PERIPH(PTIM, 0) /* AMEBA_PTIM0_CLK */ \
228 AMEBA_NUMERICAL_PERIPH(PTIM, 1) /* AMEBA_PTIM1_CLK */
229
233#define AMEBA_SPI_PERIPHS \
234 AMEBA_NUMERICAL_PERIPH(SPI, 0) /* AMEBA_SPI0_CLK */ \
235 AMEBA_NUMERICAL_PERIPH(SPI, 1) /* AMEBA_SPI1_CLK */
236
240#define AMEBA_SPORT_PERIPHS \
241 AMEBA_NUMERICAL_PERIPH(SPORT, 0) /* AMEBA_SPORT0_CLK */ \
242 AMEBA_NUMERICAL_PERIPH(SPORT, 1) /* AMEBA_SPORT1_CLK */
243
247#define AMEBA_I2C_PERIPHS \
248 AMEBA_NUMERICAL_PERIPH(I2C, 0) /* AMEBA_I2C0_CLK */ \
249 AMEBA_NUMERICAL_PERIPH(I2C, 1) /* AMEBA_I2C1_CLK */
250
254#define AMEBA_PWM_PERIPHS \
255 AMEBA_NUMERICAL_PERIPH(PWM, 0) /* AMEBA_PWM0_CLK */ \
256 AMEBA_NUMERICAL_PERIPH(PWM, 1) /* AMEBA_PWM1_CLK */
257
261#define AMEBA_HTIM_PERIPHS \
262 AMEBA_NUMERICAL_PERIPH(HTIM, 0) /* AMEBA_HTIM0_CLK */ \
263 AMEBA_NUMERICAL_PERIPH(HTIM, 1) /* AMEBA_HTIM1_CLK */
264
268#define AMEBA_UART_PERIPHS \
269 AMEBA_NUMERICAL_PERIPH(UART, 0) /* AMEBA_UART0_CLK */ \
270 AMEBA_NUMERICAL_PERIPH(UART, 1) /* AMEBA_UART1_CLK */ \
271 AMEBA_NUMERICAL_PERIPH(UART, 2) /* AMEBA_UART2_CLK */
272
276#define AMEBA_LOGUART_PERIPHS AMEBA_SINGLE_PERIPH(LOGUART) /* AMEBA_LOGUART_CLK */
277
281#define AMEBA_KSCAN_PERIPHS AMEBA_SINGLE_PERIPH(KSCAN) /* AMEBA_KSCAN_CLK */
282
286#define AMEBA_DMAC_PERIPHS AMEBA_SINGLE_PERIPH(DMAC) /* AMEBA_DMAC_CLK */
287
291#define AMEBA_SDIO_PERIPHS AMEBA_SINGLE_PERIPH(SDIO) /* AMEBA_SDIO_CLK */
292
296#define AMEBA_USB_PERIPHS AMEBA_SINGLE_PERIPH(USB) /* AMEBA_USB_CLK */
297
301#define AMEBA_FLASH_PERIPHS AMEBA_SINGLE_PERIPH(FLASH) /* AMEBA_FLASH_CLK */
302
306#define AMEBA_PSRAM_PERIPHS AMEBA_SINGLE_PERIPH(PSRAM) /* AMEBA_PSRAM_CLK */
307
311#define AMEBA_AC_PERIPHS AMEBA_SINGLE_PERIPH(AC) /* AMEBA_AC_CLK */
312
316#define AMEBA_IRDA_PERIPHS AMEBA_SINGLE_PERIPH(IRDA) /* AMEBA_IRDA_CLK */
317
321#define AMEBA_TRNG_PERIPHS AMEBA_SINGLE_PERIPH(TRNG) /* AMEBA_TRNG_CLK */
322
326#define AMEBA_RTC_PERIPHS AMEBA_SINGLE_PERIPH(RTC) /* AMEBA_RTC_CLK */
327
331#define AMEBA_LEDC_PERIPHS AMEBA_SINGLE_PERIPH(LEDC) /* AMEBA_LEDC_CLK */
332
336#define AMEBA_ADC_PERIPHS AMEBA_SINGLE_PERIPH(ADC) /* AMEBA_ADC_CLK */
337
341#define AMEBA_GPIO_PERIPHS AMEBA_SINGLE_PERIPH(GPIO) /* AMEBA_GPIO_CLK */
342
346#define AMEBA_BTON_PERIPHS AMEBA_SINGLE_PERIPH(BTON) /* AMEBA_BTON_CLK */
347
354#define AMEBA_CORE_PERIPHS \
355 AMEBA_RTC_PERIPHS \
356 AMEBA_PWM_PERIPHS \
357 AMEBA_HTIM_PERIPHS \
358 AMEBA_LEDC_PERIPHS \
359 AMEBA_UART_PERIPHS \
360 AMEBA_LOGUART_PERIPHS \
361 AMEBA_ADC_PERIPHS \
362 AMEBA_GPIO_PERIPHS \
363 AMEBA_LTIM_PERIPHS \
364 AMEBA_PTIM_PERIPHS \
365 AMEBA_KSCAN_PERIPHS \
366 AMEBA_DMAC_PERIPHS \
367 AMEBA_SDIO_PERIPHS \
368 AMEBA_SPI_PERIPHS \
369 AMEBA_USB_PERIPHS \
370 AMEBA_FLASH_PERIPHS \
371 AMEBA_SPORT_PERIPHS \
372 AMEBA_AC_PERIPHS \
373 AMEBA_I2C_PERIPHS \
374 AMEBA_TRNG_PERIPHS \
375 AMEBA_BTON_PERIPHS
376
378
379#ifdef __cplusplus
380}
381#endif
382
383#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_AMEBADPLUS_CLOCK_H_ */