Zephyr API Documentation 4.0.99
A Scalable Open Source RTOS
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ch32v00x-clocks.h File Reference

Go to the source code of this file.

Macros

#define CH32V00X_AHB_PCENR_OFFSET   0
 
#define CH32V00X_APB2_PCENR_OFFSET   1
 
#define CH32V00X_APB1_PCENR_OFFSET   2
 
#define CH32V00X_CLOCK_CONFIG(bus, bit)
 
#define CH32V00X_CLOCK_DMA1   CH32V00X_CLOCK_CONFIG(AHB, 0)
 
#define CH32V00X_CLOCK_SRAM   CH32V00X_CLOCK_CONFIG(AHB, 2)
 
#define CH32V00X_CLOCK_FLITF   CH32V00X_CLOCK_CONFIG(AHB, 4)
 
#define CH32V00X_CLOCK_CRC   CH32V00X_CLOCK_CONFIG(AHB, 6)
 
#define CH32V00X_CLOCK_USB   CH32V00X_CLOCK_CONFIG(AHB, 12)
 
#define CH32V00X_CLOCK_AFIO   CH32V00X_CLOCK_CONFIG(APB2, 0)
 
#define CH32V00X_CLOCK_IOPA   CH32V00X_CLOCK_CONFIG(APB2, 2)
 
#define CH32V00X_CLOCK_IOPB   CH32V00X_CLOCK_CONFIG(APB2, 3)
 
#define CH32V00X_CLOCK_IOPC   CH32V00X_CLOCK_CONFIG(APB2, 4)
 
#define CH32V00X_CLOCK_IOPD   CH32V00X_CLOCK_CONFIG(APB2, 5)
 
#define CH32V00X_CLOCK_ADC1   CH32V00X_CLOCK_CONFIG(APB2, 9)
 
#define CH32V00X_CLOCK_ADC2   CH32V00X_CLOCK_CONFIG(APB2, 10)
 
#define CH32V00X_CLOCK_TIM1   CH32V00X_CLOCK_CONFIG(APB2, 11)
 
#define CH32V00X_CLOCK_SPI1   CH32V00X_CLOCK_CONFIG(APB2, 12)
 
#define CH32V00X_CLOCK_USART1   CH32V00X_CLOCK_CONFIG(APB2, 14)
 
#define CH32V00X_CLOCK_TIM2   CH32V00X_CLOCK_CONFIG(APB1, 0)
 
#define CH32V00X_CLOCK_TIM3   CH32V00X_CLOCK_CONFIG(APB1, 1)
 
#define CH32V00X_CLOCK_WWDG   CH32V00X_CLOCK_CONFIG(APB1, 11)
 
#define CH32V00X_CLOCK_USART2   CH32V00X_CLOCK_CONFIG(APB1, 17)
 
#define CH32V00X_CLOCK_I2C1   CH32V00X_CLOCK_CONFIG(APB1, 21)
 
#define CH32V00X_CLOCK_BKP   CH32V00X_CLOCK_CONFIG(APB1, 27)
 
#define CH32V00X_CLOCK_PWR   CH32V00X_CLOCK_CONFIG(APB1, 28)
 
#define CH32V00X_CLOCK_USB   CH32V00X_CLOCK_CONFIG(APB1, 23)
 

Macro Definition Documentation

◆ CH32V00X_AHB_PCENR_OFFSET

#define CH32V00X_AHB_PCENR_OFFSET   0

◆ CH32V00X_APB1_PCENR_OFFSET

#define CH32V00X_APB1_PCENR_OFFSET   2

◆ CH32V00X_APB2_PCENR_OFFSET

#define CH32V00X_APB2_PCENR_OFFSET   1

◆ CH32V00X_CLOCK_ADC1

#define CH32V00X_CLOCK_ADC1   CH32V00X_CLOCK_CONFIG(APB2, 9)

◆ CH32V00X_CLOCK_ADC2

#define CH32V00X_CLOCK_ADC2   CH32V00X_CLOCK_CONFIG(APB2, 10)

◆ CH32V00X_CLOCK_AFIO

#define CH32V00X_CLOCK_AFIO   CH32V00X_CLOCK_CONFIG(APB2, 0)

◆ CH32V00X_CLOCK_BKP

#define CH32V00X_CLOCK_BKP   CH32V00X_CLOCK_CONFIG(APB1, 27)

◆ CH32V00X_CLOCK_CONFIG

#define CH32V00X_CLOCK_CONFIG ( bus,
bit )
Value:
(((CH32V00X_##bus##_PCENR_OFFSET) << 5) | (bit))

◆ CH32V00X_CLOCK_CRC

#define CH32V00X_CLOCK_CRC   CH32V00X_CLOCK_CONFIG(AHB, 6)

◆ CH32V00X_CLOCK_DMA1

#define CH32V00X_CLOCK_DMA1   CH32V00X_CLOCK_CONFIG(AHB, 0)

◆ CH32V00X_CLOCK_FLITF

#define CH32V00X_CLOCK_FLITF   CH32V00X_CLOCK_CONFIG(AHB, 4)

◆ CH32V00X_CLOCK_I2C1

#define CH32V00X_CLOCK_I2C1   CH32V00X_CLOCK_CONFIG(APB1, 21)

◆ CH32V00X_CLOCK_IOPA

#define CH32V00X_CLOCK_IOPA   CH32V00X_CLOCK_CONFIG(APB2, 2)

◆ CH32V00X_CLOCK_IOPB

#define CH32V00X_CLOCK_IOPB   CH32V00X_CLOCK_CONFIG(APB2, 3)

◆ CH32V00X_CLOCK_IOPC

#define CH32V00X_CLOCK_IOPC   CH32V00X_CLOCK_CONFIG(APB2, 4)

◆ CH32V00X_CLOCK_IOPD

#define CH32V00X_CLOCK_IOPD   CH32V00X_CLOCK_CONFIG(APB2, 5)

◆ CH32V00X_CLOCK_PWR

#define CH32V00X_CLOCK_PWR   CH32V00X_CLOCK_CONFIG(APB1, 28)

◆ CH32V00X_CLOCK_SPI1

#define CH32V00X_CLOCK_SPI1   CH32V00X_CLOCK_CONFIG(APB2, 12)

◆ CH32V00X_CLOCK_SRAM

#define CH32V00X_CLOCK_SRAM   CH32V00X_CLOCK_CONFIG(AHB, 2)

◆ CH32V00X_CLOCK_TIM1

#define CH32V00X_CLOCK_TIM1   CH32V00X_CLOCK_CONFIG(APB2, 11)

◆ CH32V00X_CLOCK_TIM2

#define CH32V00X_CLOCK_TIM2   CH32V00X_CLOCK_CONFIG(APB1, 0)

◆ CH32V00X_CLOCK_TIM3

#define CH32V00X_CLOCK_TIM3   CH32V00X_CLOCK_CONFIG(APB1, 1)

◆ CH32V00X_CLOCK_USART1

#define CH32V00X_CLOCK_USART1   CH32V00X_CLOCK_CONFIG(APB2, 14)

◆ CH32V00X_CLOCK_USART2

#define CH32V00X_CLOCK_USART2   CH32V00X_CLOCK_CONFIG(APB1, 17)

◆ CH32V00X_CLOCK_USB [1/2]

#define CH32V00X_CLOCK_USB   CH32V00X_CLOCK_CONFIG(AHB, 12)

◆ CH32V00X_CLOCK_USB [2/2]

#define CH32V00X_CLOCK_USB   CH32V00X_CLOCK_CONFIG(APB1, 23)

◆ CH32V00X_CLOCK_WWDG

#define CH32V00X_CLOCK_WWDG   CH32V00X_CLOCK_CONFIG(APB1, 11)