ch32v10x-clocks.h File Reference

CH32V10x peripheral clock identifiers for devicetree bindings. More...

Go to the source code of this file.

Macros
#define	CH32V10X_AHB_PCENR_OFFSET   0
	AHB bus register offset.
#define	CH32V10X_APB2_PCENR_OFFSET   1
	APB2 bus register offset.
#define	CH32V10X_APB1_PCENR_OFFSET   2
	APB1 bus register offset.
#define	CH32V10X_CLOCK_CONFIG(bus, bit)
	Encode a clock identifier from bus and bit position.
#define	CH32V10X_CLOCK_DMA1   CH32V10X_CLOCK_CONFIG(AHB, 0)
	DMA1 clock (AHB).
#define	CH32V10X_CLOCK_SRAM   CH32V10X_CLOCK_CONFIG(AHB, 2)
	SRAM clock (AHB).
#define	CH32V10X_CLOCK_FLITF   CH32V10X_CLOCK_CONFIG(AHB, 4)
	Flash interface clock (AHB).
#define	CH32V10X_CLOCK_CRC   CH32V10X_CLOCK_CONFIG(AHB, 6)
	CRC clock (AHB).
#define	CH32V10X_CLOCK_FSMC   CH32V10X_CLOCK_CONFIG(AHB, 8)
	FSMC clock (AHB).
#define	CH32V10X_CLOCK_USBHD   CH32V10X_CLOCK_CONFIG(AHB, 12)
	USB HD clock (AHB).
#define	CH32V10X_CLOCK_AFIO   CH32V10X_CLOCK_CONFIG(APB2, 0)
	AFIO clock (APB2).
#define	CH32V10X_CLOCK_IOPA   CH32V10X_CLOCK_CONFIG(APB2, 2)
	GPIO port A clock (APB2).
#define	CH32V10X_CLOCK_IOPB   CH32V10X_CLOCK_CONFIG(APB2, 3)
	GPIO port B clock (APB2).
#define	CH32V10X_CLOCK_IOPC   CH32V10X_CLOCK_CONFIG(APB2, 4)
	GPIO port C clock (APB2).
#define	CH32V10X_CLOCK_IOPD   CH32V10X_CLOCK_CONFIG(APB2, 5)
	GPIO port D clock (APB2).
#define	CH32V10X_CLOCK_ADC1   CH32V10X_CLOCK_CONFIG(APB2, 9)
	ADC1 clock (APB2).
#define	CH32V10X_CLOCK_TIM1   CH32V10X_CLOCK_CONFIG(APB2, 11)
	TIM1 clock (APB2).
#define	CH32V10X_CLOCK_SPI1   CH32V10X_CLOCK_CONFIG(APB2, 12)
	SPI1 clock (APB2).
#define	CH32V10X_CLOCK_USART1   CH32V10X_CLOCK_CONFIG(APB2, 14)
	USART1 clock (APB2).
#define	CH32V10X_CLOCK_TIM2   CH32V10X_CLOCK_CONFIG(APB1, 0)
	TIM2 clock (APB1).
#define	CH32V10X_CLOCK_TIM3   CH32V10X_CLOCK_CONFIG(APB1, 1)
	TIM3 clock (APB1).
#define	CH32V10X_CLOCK_TIM4   CH32V10X_CLOCK_CONFIG(APB1, 2)
	TIM4 clock (APB1).
#define	CH32V10X_CLOCK_WWDG   CH32V10X_CLOCK_CONFIG(APB1, 11)
	WWDG clock (APB1).
#define	CH32V10X_CLOCK_SPI2   CH32V10X_CLOCK_CONFIG(APB1, 14)
	SPI2 clock (APB1).
#define	CH32V10X_CLOCK_USART2   CH32V10X_CLOCK_CONFIG(APB1, 17)
	USART2 clock (APB1).
#define	CH32V10X_CLOCK_USART3   CH32V10X_CLOCK_CONFIG(APB1, 18)
	USART3 clock (APB1).
#define	CH32V10X_CLOCK_I2C1   CH32V10X_CLOCK_CONFIG(APB1, 21)
	I2C1 clock (APB1).
#define	CH32V10X_CLOCK_I2C2   CH32V10X_CLOCK_CONFIG(APB1, 22)
	I2C2 clock (APB1).
#define	CH32V10X_CLOCK_USBD   CH32V10X_CLOCK_CONFIG(APB1, 23)
	USB device clock (APB1).
#define	CH32V10X_CLOCK_CAN1   CH32V10X_CLOCK_CONFIG(APB1, 25)
	CAN1 clock (APB1).
#define	CH32V10X_CLOCK_BKP   CH32V10X_CLOCK_CONFIG(APB1, 27)
	Backup domain clock (APB1).
#define	CH32V10X_CLOCK_PWR   CH32V10X_CLOCK_CONFIG(APB1, 28)
	Power interface clock (APB1).

Detailed Description

CH32V10x peripheral clock identifiers for devicetree bindings.

Macro Definition Documentation

CH32V10X_AHB_PCENR_OFFSET

#define CH32V10X_AHB_PCENR_OFFSET   0

AHB bus register offset.

CH32V10X_APB1_PCENR_OFFSET

#define CH32V10X_APB1_PCENR_OFFSET   2

APB1 bus register offset.

CH32V10X_APB2_PCENR_OFFSET

#define CH32V10X_APB2_PCENR_OFFSET   1

APB2 bus register offset.

CH32V10X_CLOCK_ADC1

#define CH32V10X_CLOCK_ADC1   CH32V10X_CLOCK_CONFIG(APB2, 9)

ADC1 clock (APB2).

CH32V10X_CLOCK_AFIO

#define CH32V10X_CLOCK_AFIO   CH32V10X_CLOCK_CONFIG(APB2, 0)

AFIO clock (APB2).

CH32V10X_CLOCK_BKP

#define CH32V10X_CLOCK_BKP   CH32V10X_CLOCK_CONFIG(APB1, 27)

Backup domain clock (APB1).

CH32V10X_CLOCK_CAN1

#define CH32V10X_CLOCK_CAN1   CH32V10X_CLOCK_CONFIG(APB1, 25)

CAN1 clock (APB1).

CH32V10X_CLOCK_CONFIG

#define CH32V10X_CLOCK_CONFIG	(		bus,
			bit )

Value:

(((CH32V10X_##bus##_PCENR_OFFSET) << 5) | (bit))

Encode a clock identifier from bus and bit position.

CH32V10X_CLOCK_CRC

#define CH32V10X_CLOCK_CRC   CH32V10X_CLOCK_CONFIG(AHB, 6)

CRC clock (AHB).

CH32V10X_CLOCK_DMA1

#define CH32V10X_CLOCK_DMA1   CH32V10X_CLOCK_CONFIG(AHB, 0)

DMA1 clock (AHB).

CH32V10X_CLOCK_FLITF

#define CH32V10X_CLOCK_FLITF   CH32V10X_CLOCK_CONFIG(AHB, 4)

Flash interface clock (AHB).

CH32V10X_CLOCK_FSMC

#define CH32V10X_CLOCK_FSMC   CH32V10X_CLOCK_CONFIG(AHB, 8)

FSMC clock (AHB).

CH32V10X_CLOCK_I2C1

#define CH32V10X_CLOCK_I2C1   CH32V10X_CLOCK_CONFIG(APB1, 21)

I2C1 clock (APB1).

CH32V10X_CLOCK_I2C2

#define CH32V10X_CLOCK_I2C2   CH32V10X_CLOCK_CONFIG(APB1, 22)

I2C2 clock (APB1).

CH32V10X_CLOCK_IOPA

#define CH32V10X_CLOCK_IOPA   CH32V10X_CLOCK_CONFIG(APB2, 2)

GPIO port A clock (APB2).

CH32V10X_CLOCK_IOPB

#define CH32V10X_CLOCK_IOPB   CH32V10X_CLOCK_CONFIG(APB2, 3)

GPIO port B clock (APB2).

CH32V10X_CLOCK_IOPC

#define CH32V10X_CLOCK_IOPC   CH32V10X_CLOCK_CONFIG(APB2, 4)

GPIO port C clock (APB2).

CH32V10X_CLOCK_IOPD

#define CH32V10X_CLOCK_IOPD   CH32V10X_CLOCK_CONFIG(APB2, 5)

GPIO port D clock (APB2).

CH32V10X_CLOCK_PWR

#define CH32V10X_CLOCK_PWR   CH32V10X_CLOCK_CONFIG(APB1, 28)

Power interface clock (APB1).

CH32V10X_CLOCK_SPI1

#define CH32V10X_CLOCK_SPI1   CH32V10X_CLOCK_CONFIG(APB2, 12)

SPI1 clock (APB2).

CH32V10X_CLOCK_SPI2

#define CH32V10X_CLOCK_SPI2   CH32V10X_CLOCK_CONFIG(APB1, 14)

SPI2 clock (APB1).

CH32V10X_CLOCK_SRAM

#define CH32V10X_CLOCK_SRAM   CH32V10X_CLOCK_CONFIG(AHB, 2)

SRAM clock (AHB).

CH32V10X_CLOCK_TIM1

#define CH32V10X_CLOCK_TIM1   CH32V10X_CLOCK_CONFIG(APB2, 11)

TIM1 clock (APB2).

CH32V10X_CLOCK_TIM2

#define CH32V10X_CLOCK_TIM2   CH32V10X_CLOCK_CONFIG(APB1, 0)

TIM2 clock (APB1).

CH32V10X_CLOCK_TIM3

#define CH32V10X_CLOCK_TIM3   CH32V10X_CLOCK_CONFIG(APB1, 1)

TIM3 clock (APB1).

CH32V10X_CLOCK_TIM4

#define CH32V10X_CLOCK_TIM4   CH32V10X_CLOCK_CONFIG(APB1, 2)

TIM4 clock (APB1).

CH32V10X_CLOCK_USART1

#define CH32V10X_CLOCK_USART1   CH32V10X_CLOCK_CONFIG(APB2, 14)

USART1 clock (APB2).

CH32V10X_CLOCK_USART2

#define CH32V10X_CLOCK_USART2   CH32V10X_CLOCK_CONFIG(APB1, 17)

USART2 clock (APB1).

CH32V10X_CLOCK_USART3

#define CH32V10X_CLOCK_USART3   CH32V10X_CLOCK_CONFIG(APB1, 18)

USART3 clock (APB1).

CH32V10X_CLOCK_USBD

#define CH32V10X_CLOCK_USBD   CH32V10X_CLOCK_CONFIG(APB1, 23)

USB device clock (APB1).

CH32V10X_CLOCK_USBHD

#define CH32V10X_CLOCK_USBHD   CH32V10X_CLOCK_CONFIG(AHB, 12)

USB HD clock (AHB).

CH32V10X_CLOCK_WWDG

#define CH32V10X_CLOCK_WWDG   CH32V10X_CLOCK_CONFIG(APB1, 11)

WWDG clock (APB1).