#include <socfpga_handoff.h>
Go to the source code of this file.
◆ CLKMGR_ALTERA
| #define CLKMGR_ALTERA 0xffd100d0 |
◆ CLKMGR_ALTERA_EMACACTR
| #define CLKMGR_ALTERA_EMACACTR 0x4 |
◆ CLKMGR_ALTERA_EMACBCTR
| #define CLKMGR_ALTERA_EMACBCTR 0x8 |
◆ CLKMGR_ALTERA_EMACPTPCTR
| #define CLKMGR_ALTERA_EMACPTPCTR 0xc |
◆ CLKMGR_ALTERA_EXTCNTRST
| #define CLKMGR_ALTERA_EXTCNTRST 0x24 |
◆ CLKMGR_ALTERA_EXTCNTRST_RESET
| #define CLKMGR_ALTERA_EXTCNTRST_RESET 0xff |
◆ CLKMGR_ALTERA_GPIODBCTR
| #define CLKMGR_ALTERA_GPIODBCTR 0x10 |
◆ CLKMGR_ALTERA_JTAG
| #define CLKMGR_ALTERA_JTAG 0x0 |
◆ CLKMGR_ALTERA_PSIREFCTR
| #define CLKMGR_ALTERA_PSIREFCTR 0x20 |
◆ CLKMGR_ALTERA_S2FUSER0CTR
| #define CLKMGR_ALTERA_S2FUSER0CTR 0x18 |
◆ CLKMGR_ALTERA_S2FUSER1CTR
| #define CLKMGR_ALTERA_S2FUSER1CTR 0x1c |
◆ CLKMGR_ALTERA_SDMMCCTR
| #define CLKMGR_ALTERA_SDMMCCTR 0x14 |
◆ CLKMGR_CLR_LOSTLOCK_BYPASS
| #define CLKMGR_CLR_LOSTLOCK_BYPASS 0x20000000 |
◆ CLKMGR_CTRL
◆ CLKMGR_CTRL_BOOTMODE_SET_MSK
| #define CLKMGR_CTRL_BOOTMODE_SET_MSK 0x00000001 |
◆ CLKMGR_INTOSC_HZ
| #define CLKMGR_INTOSC_HZ 460000000 |
◆ CLKMGR_INTRCLR
| #define CLKMGR_INTRCLR 0x14 |
◆ CLKMGR_INTRCLR_MAINLOCKLOST_SET_MSK
| #define CLKMGR_INTRCLR_MAINLOCKLOST_SET_MSK 0x00000004 |
◆ CLKMGR_INTRCLR_PERLOCKLOST_SET_MSK
| #define CLKMGR_INTRCLR_PERLOCKLOST_SET_MSK 0x00000008 |
◆ CLKMGR_MAINPLL
| #define CLKMGR_MAINPLL 0xffd10024 |
◆ CLKMGR_MAINPLL_BYPASS
| #define CLKMGR_MAINPLL_BYPASS 0xc |
◆ CLKMGR_MAINPLL_EN
| #define CLKMGR_MAINPLL_EN 0x0 |
◆ CLKMGR_MAINPLL_EN_RESET
| #define CLKMGR_MAINPLL_EN_RESET 0x000000ff |
◆ CLKMGR_MAINPLL_FDBCK
| #define CLKMGR_MAINPLL_FDBCK 0x28 |
◆ CLKMGR_MAINPLL_LOSTLOCK
| #define CLKMGR_MAINPLL_LOSTLOCK 0x54 |
◆ CLKMGR_MAINPLL_MEM
| #define CLKMGR_MAINPLL_MEM 0x2c |
◆ CLKMGR_MAINPLL_MEMSTAT
| #define CLKMGR_MAINPLL_MEMSTAT 0x30 |
◆ CLKMGR_MAINPLL_MPUCLK
| #define CLKMGR_MAINPLL_MPUCLK 0x18 |
◆ CLKMGR_MAINPLL_NOCCLK
| #define CLKMGR_MAINPLL_NOCCLK 0x1c |
◆ CLKMGR_MAINPLL_NOCDIV
| #define CLKMGR_MAINPLL_NOCDIV 0x20 |
◆ CLKMGR_MAINPLL_PLLC0
| #define CLKMGR_MAINPLL_PLLC0 0x34 |
◆ CLKMGR_MAINPLL_PLLC1
| #define CLKMGR_MAINPLL_PLLC1 0x38 |
◆ CLKMGR_MAINPLL_PLLC2
| #define CLKMGR_MAINPLL_PLLC2 0x40 |
◆ CLKMGR_MAINPLL_PLLC3
| #define CLKMGR_MAINPLL_PLLC3 0x44 |
◆ CLKMGR_MAINPLL_PLLGLOB
| #define CLKMGR_MAINPLL_PLLGLOB 0x24 |
◆ CLKMGR_MAINPLL_PLLM
| #define CLKMGR_MAINPLL_PLLM 0x48 |
◆ CLKMGR_MAINPLL_VCOCALIB
| #define CLKMGR_MAINPLL_VCOCALIB 0x3c |
◆ CLKMGR_MEM_ADDR
| #define CLKMGR_MEM_ADDR 0x4027 |
◆ CLKMGR_MEM_ERR
| #define CLKMGR_MEM_ERR BIT(26) |
◆ CLKMGR_MEM_REQ
| #define CLKMGR_MEM_REQ BIT(24) |
◆ CLKMGR_MEM_WDAT
| #define CLKMGR_MEM_WDAT 0x80 |
◆ CLKMGR_MEM_WDAT_OFFSET
| #define CLKMGR_MEM_WDAT_OFFSET 16 |
◆ CLKMGR_MEM_WR
| #define CLKMGR_MEM_WR BIT(25) |
◆ CLKMGR_OFFSET
| #define CLKMGR_OFFSET 0xffd10000 |
◆ CLKMGR_PERPLL
| #define CLKMGR_PERPLL 0xffd1007c |
◆ CLKMGR_PERPLL_BYPASS
| #define CLKMGR_PERPLL_BYPASS 0xc |
◆ CLKMGR_PERPLL_EMACCTL
| #define CLKMGR_PERPLL_EMACCTL 0x18 |
◆ CLKMGR_PERPLL_EN
| #define CLKMGR_PERPLL_EN 0x0 |
◆ CLKMGR_PERPLL_EN_RESET
| #define CLKMGR_PERPLL_EN_RESET 0x00000fff |
◆ CLKMGR_PERPLL_EN_SDMMCCLK
| #define CLKMGR_PERPLL_EN_SDMMCCLK BIT(5) |
◆ CLKMGR_PERPLL_FDBCK
| #define CLKMGR_PERPLL_FDBCK 0x24 |
◆ CLKMGR_PERPLL_GPIODIV
| #define CLKMGR_PERPLL_GPIODIV 0x1c |
◆ CLKMGR_PERPLL_GPIODIV_GPIODBCLK_SET
| #define CLKMGR_PERPLL_GPIODIV_GPIODBCLK_SET |
( |
| x | ) |
|
Value:(((x) << 0) & 0x0000ffff)
◆ CLKMGR_PERPLL_LOSTLOCK
| #define CLKMGR_PERPLL_LOSTLOCK 0x50 |
◆ CLKMGR_PERPLL_MEM
| #define CLKMGR_PERPLL_MEM 0x28 |
◆ CLKMGR_PERPLL_MEMSTAT
| #define CLKMGR_PERPLL_MEMSTAT 0x2c |
◆ CLKMGR_PERPLL_PLLC0
| #define CLKMGR_PERPLL_PLLC0 0x30 |
◆ CLKMGR_PERPLL_PLLC1
| #define CLKMGR_PERPLL_PLLC1 0x34 |
◆ CLKMGR_PERPLL_PLLC2
| #define CLKMGR_PERPLL_PLLC2 0x3c |
◆ CLKMGR_PERPLL_PLLC3
| #define CLKMGR_PERPLL_PLLC3 0x40 |
◆ CLKMGR_PERPLL_PLLGLOB
| #define CLKMGR_PERPLL_PLLGLOB 0x20 |
◆ CLKMGR_PERPLL_PLLM
| #define CLKMGR_PERPLL_PLLM 0x44 |
◆ CLKMGR_PERPLL_VCOCALIB
| #define CLKMGR_PERPLL_VCOCALIB 0x38 |
◆ CLKMGR_PLLGLOB_AREFCLKDIV
| #define CLKMGR_PLLGLOB_AREFCLKDIV |
( |
| x | ) |
|
Value:(((x) & 0x00000f00) >> 8)
◆ CLKMGR_PLLGLOB_DREFCLKDIV
| #define CLKMGR_PLLGLOB_DREFCLKDIV |
( |
| x | ) |
|
Value:(((x) & 0x00003000) >> 12)
◆ CLKMGR_PLLGLOB_PD_SET_MSK
| #define CLKMGR_PLLGLOB_PD_SET_MSK 0x00000001 |
◆ CLKMGR_PLLGLOB_PSRC_EOSC1
| #define CLKMGR_PLLGLOB_PSRC_EOSC1 0x0 |
◆ CLKMGR_PLLGLOB_PSRC_F2S
| #define CLKMGR_PLLGLOB_PSRC_F2S 0x2 |
◆ CLKMGR_PLLGLOB_PSRC_INTOSC
| #define CLKMGR_PLLGLOB_PSRC_INTOSC 0x1 |
◆ CLKMGR_PLLGLOB_REFCLKDIV
| #define CLKMGR_PLLGLOB_REFCLKDIV |
( |
| x | ) |
|
Value:(((x) & 0x00003f00) >> 8)
◆ CLKMGR_PLLGLOB_RST_SET_MSK
| #define CLKMGR_PLLGLOB_RST_SET_MSK 0x00000002 |
◆ CLKMGR_PLLM_MDIV
| #define CLKMGR_PLLM_MDIV |
( |
| x | ) |
|
◆ CLKMGR_PSRC
Value:(((x) & 0x00030000) >> 16)
◆ CLKMGR_PSRC_MAIN
| #define CLKMGR_PSRC_MAIN 0 |
◆ CLKMGR_PSRC_PER
| #define CLKMGR_PSRC_PER 1 |
◆ CLKMGR_STAT
◆ CLKMGR_STAT_BUSY
| #define CLKMGR_STAT_BUSY |
( |
| x | ) |
|
Value:(((x) & 0x00000001) >> 0)
◆ CLKMGR_STAT_BUSY_E_BUSY
| #define CLKMGR_STAT_BUSY_E_BUSY 0x1 |
◆ CLKMGR_STAT_MAINPLLLOCKED
| #define CLKMGR_STAT_MAINPLLLOCKED |
( |
| x | ) |
|
Value:(((x) & 0x00000100) >> 8)
◆ CLKMGR_STAT_PERPLLLOCKED
| #define CLKMGR_STAT_PERPLLLOCKED |
( |
| x | ) |
|
Value:(((x) & 0x00010000) >> 16)
◆ CLKMGR_VCOCALIB_HSCNT_SET
| #define CLKMGR_VCOCALIB_HSCNT_SET |
( |
| x | ) |
|
Value:(((x) << 0) & 0x000003ff)
◆ CLKMGR_VCOCALIB_MSCNT_SET
| #define CLKMGR_VCOCALIB_MSCNT_SET |
( |
| x | ) |
|
Value:(((x) << 16) & 0x00ff0000)
◆ config_clkmgr_handoff()
| void config_clkmgr_handoff |
( |
struct handoff * | hoff_ptr | ) |
|
◆ get_mmc_clk()
◆ get_mpu_clk()
◆ get_uart_clk()
◆ get_wdt_clk()