Zephyr API Documentation 4.0.99
A Scalable Open Source RTOS
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dmic.h
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1/*
2 * Copyright (c) 2018, Intel Corporation
3 *
4 * Author: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
5 * Sathish Kuttan <sathish.k.kuttan@intel.com>
6 *
7 * SPDX-License-Identifier: Apache-2.0
8 */
9
17#ifndef ZEPHYR_INCLUDE_AUDIO_DMIC_H_
18#define ZEPHYR_INCLUDE_AUDIO_DMIC_H_
19
20
37#include <zephyr/kernel.h>
38#include <zephyr/device.h>
39
40#ifdef __cplusplus
41extern "C" {
42#endif
43
55
66
74
109
126
174
187
191struct _dmic_ops {
192 int (*configure)(const struct device *dev, struct dmic_cfg *config);
193 int (*trigger)(const struct device *dev, enum dmic_trigger cmd);
194 int (*read)(const struct device *dev, uint8_t stream, void **buffer,
195 size_t *size, int32_t timeout);
196};
197
211 enum pdm_lr lr)
212{
213 return ((((pdm & BIT_MASK(3)) << 1) | lr) <<
214 ((channel & BIT_MASK(3)) * 4U));
215}
216
229static inline void dmic_parse_channel_map(uint32_t channel_map_lo,
230 uint32_t channel_map_hi, uint8_t channel, uint8_t *pdm, enum pdm_lr *lr)
231{
232 uint32_t channel_map;
233
234 channel_map = (channel < 8) ? channel_map_lo : channel_map_hi;
235 channel_map >>= ((channel & BIT_MASK(3)) * 4U);
236
237 *pdm = (channel_map >> 1) & BIT_MASK(3);
238 *lr = (enum pdm_lr) (channel_map & BIT(0));
239}
240
253{
254 return ((skew & BIT_MASK(4)) << ((pdm & BIT_MASK(3)) * 4U));
255}
256
268static inline int dmic_configure(const struct device *dev,
269 struct dmic_cfg *cfg)
270{
271 const struct _dmic_ops *api =
272 (const struct _dmic_ops *)dev->api;
273
274 return api->configure(dev, cfg);
275}
276
287static inline int dmic_trigger(const struct device *dev,
288 enum dmic_trigger cmd)
289{
290 const struct _dmic_ops *api =
291 (const struct _dmic_ops *)dev->api;
292
293 return api->trigger(dev, cmd);
294}
295
311static inline int dmic_read(const struct device *dev, uint8_t stream,
312 void **buffer,
313 size_t *size, int32_t timeout)
314{
315 const struct _dmic_ops *api =
316 (const struct _dmic_ops *)dev->api;
317
318 return api->read(dev, stream, buffer, size, timeout);
319}
320
321#ifdef __cplusplus
322}
323#endif
324
329#endif /* ZEPHYR_INCLUDE_AUDIO_DMIC_H_ */
static int dmic_configure(const struct device *dev, struct dmic_cfg *cfg)
Configure the DMIC driver and controller(s)
Definition dmic.h:268
dmic_trigger
DMIC driver trigger commands.
Definition dmic.h:59
static uint32_t dmic_build_channel_map(uint8_t channel, uint8_t pdm, enum pdm_lr lr)
Build the channel map to populate struct pdm_chan_cfg.
Definition dmic.h:210
static int dmic_read(const struct device *dev, uint8_t stream, void **buffer, size_t *size, int32_t timeout)
Read received decimated PCM data stream.
Definition dmic.h:311
pdm_lr
PDM Channels LEFT / RIGHT.
Definition dmic.h:70
static void dmic_parse_channel_map(uint32_t channel_map_lo, uint32_t channel_map_hi, uint8_t channel, uint8_t *pdm, enum pdm_lr *lr)
Helper function to parse the channel map in pdm_chan_cfg.
Definition dmic.h:229
dmic_state
DMIC driver states.
Definition dmic.h:47
static uint32_t dmic_build_clk_skew_map(uint8_t pdm, uint8_t skew)
Build a bit map of clock skew values for each PDM channel.
Definition dmic.h:252
@ DMIC_TRIGGER_START
Start stream.
Definition dmic.h:61
@ DMIC_TRIGGER_PAUSE
Pause stream.
Definition dmic.h:62
@ DMIC_TRIGGER_RELEASE
Release paused stream.
Definition dmic.h:63
@ DMIC_TRIGGER_RESET
Reset stream.
Definition dmic.h:64
@ DMIC_TRIGGER_STOP
Stop stream.
Definition dmic.h:60
@ PDM_CHAN_RIGHT
Right channel.
Definition dmic.h:72
@ PDM_CHAN_LEFT
Left channel.
Definition dmic.h:71
@ DMIC_STATE_PAUSED
Paused.
Definition dmic.h:52
@ DMIC_STATE_UNINIT
Uninitialized.
Definition dmic.h:48
@ DMIC_STATE_CONFIGURED
Configured.
Definition dmic.h:50
@ DMIC_STATE_INITIALIZED
Initialized.
Definition dmic.h:49
@ DMIC_STATE_ERROR
Error.
Definition dmic.h:53
@ DMIC_STATE_ACTIVE
Active.
Definition dmic.h:51
static void cmd(uint32_t command)
Execute a display list command by co-processor engine.
Definition ft8xx_reference_api.h:153
#define BIT(n)
Unsigned integer with bit position n set (signed in assembly language).
Definition util_macro.h:44
#define BIT_MASK(n)
Bit mask with bits 0 through n-1 (inclusive) set, or 0 if n is 0.
Definition util_macro.h:68
Public kernel APIs.
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
__INT32_TYPE__ int32_t
Definition stdint.h:74
__UINT8_TYPE__ uint8_t
Definition stdint.h:88
__UINT16_TYPE__ uint16_t
Definition stdint.h:89
Runtime device structure (in ROM) per driver instance.
Definition device.h:411
const void * api
Address of the API structure exposed by the device instance.
Definition device.h:417
Input configuration structure for the DMIC configuration API.
Definition dmic.h:178
struct pcm_stream_cfg * streams
Array of pcm_stream_cfg for application to provide configuration for each stream.
Definition dmic.h:184
struct pdm_chan_cfg channel
Definition dmic.h:185
struct pdm_io_cfg io
Definition dmic.h:179
Configuration of the PCM streams to be output by the PDM hardware.
Definition dmic.h:116
uint16_t block_size
PCM sample block size per transfer.
Definition dmic.h:122
uint8_t pcm_width
PCM sample width of stream.
Definition dmic.h:120
struct k_mem_slab * mem_slab
SLAB for DMIC driver to allocate buffers for stream.
Definition dmic.h:124
uint32_t pcm_rate
PCM sample rate of stream.
Definition dmic.h:118
Mapping/ordering of the PDM channels to logical PCM output channel.
Definition dmic.h:148
uint32_t req_chan_map_lo
Channels 0 to 7.
Definition dmic.h:153
uint32_t req_chan_map_hi
Channels 8 to 15.
Definition dmic.h:154
uint8_t act_num_chan
Actual number of channels that the driver could configure.
Definition dmic.h:168
uint32_t act_chan_map_lo
Channels 0 to 7.
Definition dmic.h:161
uint8_t act_num_streams
Actual number of streams that the driver could configure.
Definition dmic.h:172
uint32_t act_chan_map_hi
Channels 8 to 15.
Definition dmic.h:162
uint8_t req_num_chan
Requested number of channels.
Definition dmic.h:166
uint8_t req_num_streams
Requested number of streams for each channel.
Definition dmic.h:170
PDM Input/Output signal configuration.
Definition dmic.h:78
uint8_t min_pdm_clk_dc
Minimum duty cycle in % supported by the mic.
Definition dmic.h:88
uint8_t pdm_clk_pol
Bit mask to optionally invert PDM clock.
Definition dmic.h:100
uint32_t max_pdm_clk_freq
Maximum clock frequency supported by the mic.
Definition dmic.h:86
uint32_t pdm_clk_skew
Collection of clock skew values for each PDM port.
Definition dmic.h:104
uint8_t max_pdm_clk_dc
Maximum duty cycle in % supported by the mic.
Definition dmic.h:90
uint8_t pdm_data_pol
Bit mask to optionally invert mic data.
Definition dmic.h:102
uint32_t min_pdm_clk_freq
Minimum clock frequency supported by the mic.
Definition dmic.h:84