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Zephyr API Documentation 4.3.99
A Scalable Open Source RTOS
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Go to the source code of this file.
Macros | |
| #define | EM32F967_GPIO 0 /* 000: GPIO function */ |
| EM32F967 Pin Control Definitions (STM32-style). | |
| #define | EM32F967_AF1 1 /* 001: Alternate function 1 (SPI1, etc.) */ |
| #define | EM32F967_AF2 2 /* 010: Alternate function 2 (UART, etc.) */ |
| #define | EM32F967_AF3 3 /* 011: Alternate function 3 (Timer, 7816, etc.) */ |
| #define | EM32F967_AF4 4 /* 100: Alternate function 4 (I2C, etc.) */ |
| #define | EM32F967_AF5 5 /* 101: Alternate function 5 (I2C, WKUP, etc.) */ |
| #define | EM32F967_AF6 6 /* 110: Alternate function 6 (SSP2, etc.) */ |
| #define | EM32F967_AF7 7 /* 111: Alternate function 7 (PWM, etc.) */ |
| #define | EM32F967_MUX_SHIFT 0U |
| Pin configuration bit field encoding (STM32-style). | |
| #define | EM32F967_MUX_MASK 0x7U |
| #define | EM32F967_PIN_SHIFT 3U |
| #define | EM32F967_PIN_MASK 0xFU |
| #define | EM32F967_PORT_SHIFT 7U |
| #define | EM32F967_PORT_MASK 0x1U |
| #define | EM32F967_PINMUX(port, pin, mux) |
| EM32F967 Pin Multiplexing Macro (STM32-style). | |
| #define | EM32F967_DT_PINMUX_PORT(pinmux) |
| #define | EM32F967_DT_PINMUX_PIN(pinmux) |
| #define | EM32F967_DT_PINMUX_MUX(pinmux) |
| #define | EM32F967_PULL_NONE_5V 0 /* 00: Floating */ |
| #define | EM32F967_PULL_UP0_5V 1 /* 01: PU0 (66KΩ@5V, 101KΩ@3.3V, 238KΩ@1.8V) */ |
| #define | EM32F967_PULL_UP1_5V 2 /* 10: PU1 (4.7KΩ@5V, 6.41KΩ@3.3V, 12.7KΩ@1.8V) */ |
| #define | EM32F967_PULL_DOWN_5V 3 /* 11: PD (15KΩ@5V, 21.8KΩ@3.3V, 49.6KΩ@1.8V) */ |
| #define | EM32F967_PULL_NONE_3V 0 /* 00: Floating */ |
| #define | EM32F967_PULL_UP0_3V 1 /* 01: PU0 (66KΩ@3.3V, 140KΩ@1.8V) */ |
| #define | EM32F967_PULL_UP1_3V 2 /* 10: PU1 (4.7KΩ@3.3V, 8.53KΩ@1.8V) */ |
| #define | EM32F967_PULL_DOWN_3V 3 /* 11: PD (15KΩ@3.3V, 25.2KΩ@1.8V) */ |
| #define | EM32F967_DRIVE_NORMAL 0 /* Normal drive strength */ |
| #define | EM32F967_DRIVE_HIGH 1 /* High drive strength (Load=30pF) */ |
| #define EM32F967_AF1 1 /* 001: Alternate function 1 (SPI1, etc.) */ |
| #define EM32F967_AF2 2 /* 010: Alternate function 2 (UART, etc.) */ |
| #define EM32F967_AF3 3 /* 011: Alternate function 3 (Timer, 7816, etc.) */ |
| #define EM32F967_AF4 4 /* 100: Alternate function 4 (I2C, etc.) */ |
| #define EM32F967_AF5 5 /* 101: Alternate function 5 (I2C, WKUP, etc.) */ |
| #define EM32F967_AF6 6 /* 110: Alternate function 6 (SSP2, etc.) */ |
| #define EM32F967_AF7 7 /* 111: Alternate function 7 (PWM, etc.) */ |
| #define EM32F967_DRIVE_HIGH 1 /* High drive strength (Load=30pF) */ |
| #define EM32F967_DRIVE_NORMAL 0 /* Normal drive strength */ |
| #define EM32F967_DT_PINMUX_MUX | ( | pinmux | ) |
| #define EM32F967_DT_PINMUX_PIN | ( | pinmux | ) |
| #define EM32F967_DT_PINMUX_PORT | ( | pinmux | ) |
| #define EM32F967_GPIO 0 /* 000: GPIO function */ |
EM32F967 Pin Control Definitions (STM32-style).
This header defines the pin control macros for the EM32F967 microcontroller following the STM32 pinctrl design pattern. Based on EM32F967_Complete_Specification_v1.0.md
| #define EM32F967_MUX_MASK 0x7U |
| #define EM32F967_MUX_SHIFT 0U |
Pin configuration bit field encoding (STM32-style).
Fields:
This encoding allows up to 2 ports, 16 pins per port, and 8 mux functions
| #define EM32F967_PIN_MASK 0xFU |
| #define EM32F967_PIN_SHIFT 3U |
| #define EM32F967_PINMUX | ( | port, | |
| pin, | |||
| mux ) |
EM32F967 Pin Multiplexing Macro (STM32-style).
| port | Port identifier ('A' or 'B') |
| pin | Pin number (0-15) |
| mux | Multiplexing function (GPIO, AF1-AF7) |
| #define EM32F967_PORT_MASK 0x1U |
| #define EM32F967_PORT_SHIFT 7U |
| #define EM32F967_PULL_DOWN_3V 3 /* 11: PD (15KΩ@3.3V, 25.2KΩ@1.8V) */ |
| #define EM32F967_PULL_DOWN_5V 3 /* 11: PD (15KΩ@5V, 21.8KΩ@3.3V, 49.6KΩ@1.8V) */ |
| #define EM32F967_PULL_NONE_3V 0 /* 00: Floating */ |
| #define EM32F967_PULL_NONE_5V 0 /* 00: Floating */ |
| #define EM32F967_PULL_UP0_3V 1 /* 01: PU0 (66KΩ@3.3V, 140KΩ@1.8V) */ |
| #define EM32F967_PULL_UP0_5V 1 /* 01: PU0 (66KΩ@5V, 101KΩ@3.3V, 238KΩ@1.8V) */ |
| #define EM32F967_PULL_UP1_3V 2 /* 10: PU1 (4.7KΩ@3.3V, 8.53KΩ@1.8V) */ |
| #define EM32F967_PULL_UP1_5V 2 /* 10: PU1 (4.7KΩ@5V, 6.41KΩ@3.3V, 12.7KΩ@1.8V) */ |