Renesas R-Car pin control helpers

Pin and function macros for Renesas R-Car Gen3/Gen4/Gen5 SoCs. More...

Files
file	pinctrl-r8a77951.h
	Renesas R-Car H3 (R8A77951) pin and function definitions.
file	pinctrl-r8a77961.h
	Renesas R-Car M3-W (R8A77961) pin and function definitions.
file	pinctrl-r8a779f0.h
	Renesas R-Car S4 (R8A779F0) pin and function definitions.
file	pinctrl-r8a779g0.h
	Renesas R-Car V4H (R8A779G0) pin and function definitions.
file	pinctrl-r8a78000.h
	Renesas R-Car Gen5 (R8A78000) pin and function definitions.
file	pinctrl-rcar-common.h
	Devicetree pin control helpers for Renesas R-Car.

Macros
#define	IPSR(bank, shift, func)
	Utility macro to build IPSR property entry (Gen3/4 only).
#define	RCAR_GP_PIN(bank, pin)
	Utility macro to encode a GPIO capable pin.
#define	RCAR_NOGP_PIN(pin)
	Utility macro to encode a non capable GPIO pin.
#define	IPnSR(bank, reg, shift, func)
	Utility macro to build an IPSR property entry for Gen4 SoCs.
#define	IPSR_DUMMY   IPnSR(0x1f, 7, 0x1f, 0xf)
	Macro to define a dummy IPSR flag for a pin.
#define	RCAR_ALTSEL_FUNC(group, pin, func)
	Utility macro to build ALTSEL property entry (Gen5 only).

R-Car pin I/O voltage levels
#define	PIN_VOLTAGE_NONE   0
	No I/O voltage selection.
#define	PIN_VOLTAGE_1P8V   1
	1.8 V I/O voltage.
#define	PIN_VOLTAGE_3P3V   2
	3.3 V I/O voltage.

Detailed Description

Pin and function macros for Renesas R-Car Gen3/Gen4/Gen5 SoCs.

The R-Car Pin Function Controller (PFC) is configured by pairing a pin identifier with the alternate function to route to it. Both are defined per SoC in the matching header:

• pinctrl-r8a77951.h — R-Car H3
• pinctrl-r8a77961.h — R-Car M3-W
• pinctrl-r8a779f0.h — R-Car S4
• pinctrl-r8a779g0.h — R-Car V4H
• pinctrl-r8a78000.h — R-Car Gen5

Each of those headers provides PIN_<NAME> pin identifiers and FUNC_<NAME> alternate-function values, where <NAME> is the signal name from the SoC datasheet (for example PIN_RD and FUNC_CAN0_TX_A). Both are built from the encoding helpers defined here — RCAR_GP_PIN() and RCAR_NOGP_PIN() for pins, IPSR() / IPnSR() (Gen3/4) or RCAR_ALTSEL_FUNC() (Gen5) for functions.

#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-r8a77951.h>
 
&pfc {
        can0_data_a_tx_default: can0_data_a_tx_default {
                pin = <PIN_RD FUNC_CAN0_TX_A>;
        };
};

Macro Definition Documentation

IPnSR

#define IPnSR	(		bank,
			reg,
			shift,
			func )

#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rcar-common.h>

Value:

IPSR(((reg) << 5U) | (bank), shift, func)

Utility macro to build an IPSR property entry for Gen4 SoCs.

Renesas Gen4 has IPSR registers at different base addresses; reg is an index for the base address. Each base address has 4 IPSR banks.

Parameters

bank	the IPSR register bank.
reg	the IPSR base address index.
shift	the bit shift for this alternate function.
func	the 4 bits encoded alternate function.

IPSR

#define IPSR	(		bank,
			shift,
			func )

#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rcar-common.h>

Value:

(((bank) << 10U) | ((shift) << 4U) | (func))

Utility macro to build IPSR property entry (Gen3/4 only).

IPSR: Peripheral Function Select Register Each IPSR bank can hold 8 cellules of 4 bits coded function.

Parameters

bank	the IPSR register bank.
shift	the bit shift for this alternate function.
func	the 4 bits encoded alternate function.

Function code [ 0 : 3 ] Function shift [ 4 : 8 ] Empty [ 9 ] IPSR bank [ 10 : 14 ] Register index [ 15 : 17 ] (S4 only)

IPSR_DUMMY

#define IPSR_DUMMY   IPnSR(0x1f, 7, 0x1f, 0xf)

#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rcar-common.h>

Macro to define a dummy IPSR flag for a pin.

This macro is used to define a dummy IPSR flag for a pin in the R-Car PFC driver. It is intended for pins that do not have a specific function defined in IPSR but always act as a peripheral. The dummy IPSR flag ensures that the driver sets the 'peripheral' bit for such pins.

See also

RCAR_PIN_FLAGS_FUNC_DUMMY

PIN_VOLTAGE_1P8V

#define PIN_VOLTAGE_1P8V   1

#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rcar-common.h>

1.8 V I/O voltage.

PIN_VOLTAGE_3P3V

#define PIN_VOLTAGE_3P3V   2

#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rcar-common.h>

3.3 V I/O voltage.

PIN_VOLTAGE_NONE

#define PIN_VOLTAGE_NONE   0

#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rcar-common.h>

No I/O voltage selection.

RCAR_ALTSEL_FUNC

#define RCAR_ALTSEL_FUNC	(		group,
			pin,
			func )

#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rcar-common.h>

Value:

(((pin) << 14U) | ((group) << 10U) | (func))

Utility macro to build ALTSEL property entry (Gen5 only).

ALTSELn (n = 0 to 3): Alternative Peripheral Function Select Registers. Each function is coded on 4 bits hold by ALTSELn registers (1 bit per ALTSELn register).

Parameters

group	The GPIO group (from 0 to 10).
pin	The pin (i.e. bit from 0 to 31).
func	The alternate function, encoded on 4 bits.

Function code [ 0 : 3 ] Empty [ 4 : 9 ] GPIO group [ 10 : 13 ] Pin [ 14 : 18 ]

RCAR_GP_PIN

#define RCAR_GP_PIN	(		bank,
			pin )

#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rcar-common.h>

Value:

(((bank) * 32U) + (pin))

Utility macro to encode a GPIO capable pin.

Parameters

bank	the GPIO bank
pin	the pin within the GPIO bank (0..31)

RCAR_NOGP_PIN

#define RCAR_NOGP_PIN

(

pin

)

#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rcar-common.h>

Value:

(PIN_NOGPSR_START + pin)

Utility macro to encode a non capable GPIO pin.

Parameters

pin	the encoded pin number