Zephyr API Documentation 4.4.99
A Scalable Open Source RTOS
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Macros for pin control configuration of Renesas RX SoCs. More...

Files

file  pinctrl-rx.h
 Devicetree pin control helpers for Renesas RX.

Macros

#define RX_PSEL(psel, port_num, pin_num)
 Macro to encode a pin configuration for Renesas RX SoCs.

Detailed Description

Macros for pin control configuration of Renesas RX SoCs.

Pins are configured through the Multi-Function Pin Controller (MPC). Each pin configuration is built with the RX_PSEL() macro, which combines a peripheral-function selector, the port number, and the pin number within that port.

Two flavors of selector are provided. Generic selectors named RX_PSEL_<PERIPHERAL> carry a function code shared by every pin of a peripheral, where <PERIPHERAL> is one of RSCI, SCI_1, SCI_5, SCI_6, SCI_12, TMR, POE, ADC or LVD.

Per-pin selectors named RX_PSEL_P<PORT>nPFS_<SIGNAL> (for example RX_PSEL_P1nPFS_RXD1) give the exact code for one pin, where <PORT> is the port letter/number and <SIGNAL> is the peripheral signal routed to the pin. Signals are grouped by peripheral:

  • Multi-function timer (MTU): MTIOC0A ... MTIOC5W, MTCLKA ... MTCLKD
  • 8-bit timer (TMR): TMO0 ... TMO3, TMCI0 ... TMCI3, TMRI0 ... TMRI3
  • Serial (SCI): RXD0 ... RXD12, TXD0 ... TXD12, SCK0 ... SCK12, CTS, RTS, SS
  • SPI (RSPI, or SCI in simple-SPI mode): RSPCKA, MOSIA, MISOA, SSLA0 ... SSLA3, SMOSI, SMISO
  • I2C (RIIC, or SCI in simple-I2C mode): SCL, SDA, SSCL, SSDA
  • Capacitive touch (CTSU): TS0 ... TS35, TSCAP
  • Comparator: CMPOB0, CMPOB1
  • Misc: POE0 ... POE8, ADTRG0, RTCOUT, CLKOUT, CACREF
#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rx.h>
&pinctrl {
sci1_default: sci1_default {
group1 {
psels = <RX_PSEL(RX_PSEL_SCI_1, 2, 6)>;
};
group2 {
psels = <RX_PSEL(RX_PSEL_SCI_1, 3, 0)>;
};
};
};

Macro Definition Documentation

◆ RX_PSEL

#define RX_PSEL ( psel,
port_num,
pin_num )

#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rx.h>

Value:
(psel << RX_PSEL_POS | pin_num << RX_PIN_NUM_POS | port_num << RX_PORT_NUM_POS)

Macro to encode a pin configuration for Renesas RX SoCs.

This macro encodes the mode, peripheral selection (PSEL), port number, and pin number into a single 32-bit value suitable for use in DeviceTree pinctrl configurations.

Parameters
pselPeripheral selection value (use RX_PSEL_* macros).
port_numPort number.
pin_numPin number within the port.
Returns
Encoded pin configuration value.