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Zephyr API Documentation 4.4.99
A Scalable Open Source RTOS
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Macros for pin control configuration of Renesas RX SoCs. More...
Files | |
| file | pinctrl-rx.h |
| Devicetree pin control helpers for Renesas RX. | |
Macros | |
| #define | RX_PSEL(psel, port_num, pin_num) |
| Macro to encode a pin configuration for Renesas RX SoCs. | |
Macros for pin control configuration of Renesas RX SoCs.
Pins are configured through the Multi-Function Pin Controller (MPC). Each pin configuration is built with the RX_PSEL() macro, which combines a peripheral-function selector, the port number, and the pin number within that port.
Two flavors of selector are provided. Generic selectors named RX_PSEL_<PERIPHERAL> carry a function code shared by every pin of a peripheral, where <PERIPHERAL> is one of RSCI, SCI_1, SCI_5, SCI_6, SCI_12, TMR, POE, ADC or LVD.
Per-pin selectors named RX_PSEL_P<PORT>nPFS_<SIGNAL> (for example RX_PSEL_P1nPFS_RXD1) give the exact code for one pin, where <PORT> is the port letter/number and <SIGNAL> is the peripheral signal routed to the pin. Signals are grouped by peripheral:
MTIOC0A ... MTIOC5W, MTCLKA ... MTCLKD TMO0 ... TMO3, TMCI0 ... TMCI3, TMRI0 ... TMRI3 RXD0 ... RXD12, TXD0 ... TXD12, SCK0 ... SCK12, CTS, RTS, SS RSPCKA, MOSIA, MISOA, SSLA0 ... SSLA3, SMOSI, SMISO SCL, SDA, SSCL, SSDA TS0 ... TS35, TSCAP CMPOB0, CMPOB1 POE0 ... POE8, ADTRG0, RTCOUT, CLKOUT, CACREF | #define RX_PSEL | ( | psel, | |
| port_num, | |||
| pin_num ) |
#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rx.h>
Macro to encode a pin configuration for Renesas RX SoCs.
This macro encodes the mode, peripheral selection (PSEL), port number, and pin number into a single 32-bit value suitable for use in DeviceTree pinctrl configurations.
| psel | Peripheral selection value (use RX_PSEL_* macros). |
| port_num | Port number. |
| pin_num | Pin number within the port. |