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Zephyr API Documentation 4.4.99
A Scalable Open Source RTOS
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Power domain definitions for NXP i.MX952 SoC. More...
Go to the source code of this file.
Macros | |
| #define | IMX952_PD_ANA 0 |
| Analog power domain. | |
| #define | IMX952_PD_AON 1 |
| Always-on power domain. | |
| #define | IMX952_PD_BBSM 2 |
| BBSM (Battery-Backed Security Module) power domain. | |
| #define | IMX952_PD_CAMERA 3 |
| Camera subsystem power domain. | |
| #define | IMX952_PD_CCMSRCGPC 4 |
| CCM/SRC/GPC power domain. | |
| #define | IMX952_PD_A55C0 5 |
| A55 Core 0 power domain. | |
| #define | IMX952_PD_A55C1 6 |
| A55 Core 1 power domain. | |
| #define | IMX952_PD_A55C2 7 |
| A55 Core 2 power domain. | |
| #define | IMX952_PD_A55C3 8 |
| A55 Core 3 power domain. | |
| #define | IMX952_PD_A55P 9 |
| A55 Platform power domain. | |
| #define | IMX952_PD_DDR 10 |
| DDR subsystem power domain. | |
| #define | IMX952_PD_DISPLAY 11 |
| Display subsystem power domain. | |
| #define | IMX952_PD_GPU 12 |
| GPU power domain. | |
| #define | IMX952_PD_HSIO_TOP 13 |
| HSIO Top power domain. | |
| #define | IMX952_PD_HSIO_WAON 14 |
| HSIO Wakeup-AON power domain. | |
| #define | IMX952_PD_M7 15 |
| M7 core power domain. | |
| #define | IMX952_PD_NETC 16 |
| NETC (Network Controller) power domain. | |
| #define | IMX952_PD_NOC 17 |
| NOC (Network-on-Chip) power domain. | |
| #define | IMX952_PD_NPU 18 |
| NPU (Neural Processing Unit) power domain. | |
| #define | IMX952_PD_VPU 19 |
| VPU (Video Processing Unit) power domain. | |
| #define | IMX952_PD_WAKEUP 20 |
| Wakeup domain power domain. | |
| #define | IMX952_NUM_MIX_SLICE 21 |
| Total number of MIX power domain slices. | |
Power domain definitions for NXP i.MX952 SoC.
This file defines power domain IDs for the i.MX952 system-on-chip. These definitions are based on MIMX9529 fsl_power.h from MCUXpresso SDK.