infineon-autanalog-ctdac.h

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/*
 * SPDX-FileCopyrightText: <text>Copyright (c) 2026 Infineon Technologies AG,
 * or an affiliate of Infineon Technologies AG. All rights reserved.</text>
 *
 * SPDX-License-Identifier: Apache-2.0
 */

 
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_DAC_INFINEON_AUTANALOG_CTDAC_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_DAC_INFINEON_AUTANALOG_CTDAC_H_

#define IFX_AUTANALOG_CTDAC_REF_BUF_PWR_OFF             0  
#define IFX_AUTANALOG_CTDAC_REF_BUF_PWR_ULTRA_LOW       1  
#define IFX_AUTANALOG_CTDAC_REF_BUF_PWR_ULTRA_LOW_RAIL  2  
#define IFX_AUTANALOG_CTDAC_REF_BUF_PWR_LOW_RAIL        4  
#define IFX_AUTANALOG_CTDAC_REF_BUF_PWR_MEDIUM_RAIL     6  
#define IFX_AUTANALOG_CTDAC_REF_BUF_PWR_HIGH            7  
#define IFX_AUTANALOG_CTDAC_REF_BUF_PWR_HIGH_RAIL       8  
#define IFX_AUTANALOG_CTDAC_REF_BUF_PWR_ULTRA_HIGH_RAIL 10 

#define IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_OFF             0  
#define IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_ULTRA_LOW       1  
#define IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_ULTRA_LOW_RAIL  2  
#define IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_LOW_RAIL        4  
#define IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_MEDIUM_RAIL     6  
#define IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_HIGH_RAIL       8  
#define IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_ULTRA_HIGH_RAIL 10 

#define IFX_AUTANALOG_CTDAC_VREF_VDDA     0x100 
#define IFX_AUTANALOG_CTDAC_VREF_VBGR     0     
#define IFX_AUTANALOG_CTDAC_VREF_CTB0_OA0 1     
#define IFX_AUTANALOG_CTDAC_VREF_CTB0_OA1 2     
#define IFX_AUTANALOG_CTDAC_VREF_CTB1_OA0 3     
#define IFX_AUTANALOG_CTDAC_VREF_CTB1_OA1 4     
#define IFX_AUTANALOG_CTDAC_VREF_PRB_OUT0 6     
#define IFX_AUTANALOG_CTDAC_VREF_PRB_OUT1 7     

#define IFX_AUTANALOG_CTDAC_TOPO_DIRECT            0 
#define IFX_AUTANALOG_CTDAC_TOPO_DIRECT_TRACK_CAP  1 
#define IFX_AUTANALOG_CTDAC_TOPO_DIRECT_TRACK_HOLD 2 
#define IFX_AUTANALOG_CTDAC_TOPO_BUFFERED_INTERNAL 3 
#define IFX_AUTANALOG_CTDAC_TOPO_BUFFERED_EXTERNAL 4 

#define IFX_AUTANALOG_CTDAC_OP_OS_ONE_QUAD    0 
#define IFX_AUTANALOG_CTDAC_OP_OS_TWO_QUAD    1 
#define IFX_AUTANALOG_CTDAC_OP_OS_FOUR_QUAD   2 
#define IFX_AUTANALOG_CTDAC_OP_CONT_ONE_QUAD  3 
#define IFX_AUTANALOG_CTDAC_OP_CONT_TWO_QUAD  4 
#define IFX_AUTANALOG_CTDAC_OP_CONT_FOUR_QUAD 5 
#define IFX_AUTANALOG_CTDAC_OP_ADDR           6 
#define IFX_AUTANALOG_CTDAC_OP_DATA           7 

#define IFX_AUTANALOG_CTDAC_STEP_SEL_DISABLED 0 
#define IFX_AUTANALOG_CTDAC_STEP_SEL_0        1 
#define IFX_AUTANALOG_CTDAC_STEP_SEL_1        2 
#define IFX_AUTANALOG_CTDAC_STEP_SEL_2        3 

#define IFX_AUTANALOG_CTDAC_STAT_SEL_DISABLED 0 
#define IFX_AUTANALOG_CTDAC_STAT_SEL_0        1 
#define IFX_AUTANALOG_CTDAC_STAT_SEL_1        2 
#define IFX_AUTANALOG_CTDAC_STAT_SEL_2        3 

#define IFX_AUTANALOG_CTDAC_LIMIT_BELOW   0 
#define IFX_AUTANALOG_CTDAC_LIMIT_INSIDE  1 
#define IFX_AUTANALOG_CTDAC_LIMIT_ABOVE   2 
#define IFX_AUTANALOG_CTDAC_LIMIT_OUTSIDE 3 
 
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_DAC_INFINEON_AUTANALOG_CTDAC_H_ */