infineon-autanalog-ctdac.h File Reference

Devicetree binding constants for Infineon AutAnalog CTDAC. More...

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Macros
Reference buffer power modes (cy_en_autanalog_dac_ref_buf_pwr_t)
#define	IFX_AUTANALOG_CTDAC_REF_BUF_PWR_OFF   0
	Reference buffer powered off.
#define	IFX_AUTANALOG_CTDAC_REF_BUF_PWR_ULTRA_LOW   1
	Ultra low power, charge pump off.
#define	IFX_AUTANALOG_CTDAC_REF_BUF_PWR_ULTRA_LOW_RAIL   2
	Ultra low power, charge pump on.
#define	IFX_AUTANALOG_CTDAC_REF_BUF_PWR_LOW_RAIL   4
	Low power, charge pump on.
#define	IFX_AUTANALOG_CTDAC_REF_BUF_PWR_MEDIUM_RAIL   6
	Medium power, charge pump on.
#define	IFX_AUTANALOG_CTDAC_REF_BUF_PWR_HIGH   7
	High power mode.
#define	IFX_AUTANALOG_CTDAC_REF_BUF_PWR_HIGH_RAIL   8
	High power, charge pump on.
#define	IFX_AUTANALOG_CTDAC_REF_BUF_PWR_ULTRA_HIGH_RAIL   10
	Ultra high, charge pump on.
Output buffer power modes (cy_en_autanalog_dac_out_buf_pwr_t)
#define	IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_OFF   0
	Output buffer powered off.
#define	IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_ULTRA_LOW   1
	Ultra low power, charge pump off.
#define	IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_ULTRA_LOW_RAIL   2
	Ultra low power, charge pump on.
#define	IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_LOW_RAIL   4
	Low power, charge pump on.
#define	IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_MEDIUM_RAIL   6
	Medium power, charge pump on.
#define	IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_HIGH_RAIL   8
	High power, charge pump on.
#define	IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_ULTRA_HIGH_RAIL   10
	Ultra high, charge pump on.
Vref source (combined vrefSel + vrefMux encoding)
VDDA uses bit 8 as a flag. All other values map directly to the cy_en_autanalog_dac_vref_mux_t PDL encoding.
#define	IFX_AUTANALOG_CTDAC_VREF_VDDA   0x100
	VDDA supply.
#define	IFX_AUTANALOG_CTDAC_VREF_VBGR   0
	Band-gap reference.
#define	IFX_AUTANALOG_CTDAC_VREF_CTB0_OA0   1
	CTB0 OpAmp0 output.
#define	IFX_AUTANALOG_CTDAC_VREF_CTB0_OA1   2
	CTB0 OpAmp1 output.
#define	IFX_AUTANALOG_CTDAC_VREF_CTB1_OA0   3
	CTB1 OpAmp0 output.
#define	IFX_AUTANALOG_CTDAC_VREF_CTB1_OA1   4
	CTB1 OpAmp1 output.
#define	IFX_AUTANALOG_CTDAC_VREF_PRB_OUT0   6
	PRB output 0.
#define	IFX_AUTANALOG_CTDAC_VREF_PRB_OUT1   7
	PRB output 1.
Topology (cy_en_autanalog_dac_topo_cfg_t)
#define	IFX_AUTANALOG_CTDAC_TOPO_DIRECT   0
	Direct output.
#define	IFX_AUTANALOG_CTDAC_TOPO_DIRECT_TRACK_CAP   1
	Direct output with track capacitor.
#define	IFX_AUTANALOG_CTDAC_TOPO_DIRECT_TRACK_HOLD   2
	Direct output with track-and-hold.
#define	IFX_AUTANALOG_CTDAC_TOPO_BUFFERED_INTERNAL   3
	Internally buffered output.
#define	IFX_AUTANALOG_CTDAC_TOPO_BUFFERED_EXTERNAL   4
	Externally buffered output.
Waveform operating mode (cy_en_autanalog_dac_oper_mode_t)
#define	IFX_AUTANALOG_CTDAC_OP_OS_ONE_QUAD   0
	One-shot, one quadrant.
#define	IFX_AUTANALOG_CTDAC_OP_OS_TWO_QUAD   1
	One-shot, two quadrants.
#define	IFX_AUTANALOG_CTDAC_OP_OS_FOUR_QUAD   2
	One-shot, four quadrants.
#define	IFX_AUTANALOG_CTDAC_OP_CONT_ONE_QUAD   3
	Continuous, one quadrant.
#define	IFX_AUTANALOG_CTDAC_OP_CONT_TWO_QUAD   4
	Continuous, two quadrants.
#define	IFX_AUTANALOG_CTDAC_OP_CONT_FOUR_QUAD   5
	Continuous, four quadrants.
#define	IFX_AUTANALOG_CTDAC_OP_ADDR   6
	Address waveform table mode.
#define	IFX_AUTANALOG_CTDAC_OP_DATA   7
	Data waveform table mode.
Step value selector (cy_en_autanalog_dac_step_sel_t)
#define	IFX_AUTANALOG_CTDAC_STEP_SEL_DISABLED   0
	Step selection disabled.
#define	IFX_AUTANALOG_CTDAC_STEP_SEL_0   1
	Use step value 0.
#define	IFX_AUTANALOG_CTDAC_STEP_SEL_1   2
	Use step value 1.
#define	IFX_AUTANALOG_CTDAC_STEP_SEL_2   3
	Use step value 2.
Status and range detection selector (cy_en_autanalog_dac_stat_sel_t)
#define	IFX_AUTANALOG_CTDAC_STAT_SEL_DISABLED   0
	Status selection disabled.
#define	IFX_AUTANALOG_CTDAC_STAT_SEL_0   1
	Use status selector 0.
#define	IFX_AUTANALOG_CTDAC_STAT_SEL_1   2
	Use status selector 1.
#define	IFX_AUTANALOG_CTDAC_STAT_SEL_2   3
	Use status selector 2.
Channel limit and range detection condition (cy_en_autanalog_dac_limit_t)
#define	IFX_AUTANALOG_CTDAC_LIMIT_BELOW   0
	Result is below the configured range.
#define	IFX_AUTANALOG_CTDAC_LIMIT_INSIDE   1
	Result is inside the configured range.
#define	IFX_AUTANALOG_CTDAC_LIMIT_ABOVE   2
	Result is above the configured range.
#define	IFX_AUTANALOG_CTDAC_LIMIT_OUTSIDE   3
	Result is outside the configured range.

Detailed Description

Devicetree binding constants for Infineon AutAnalog CTDAC.

These constants match the PDL enum values and are intended for use in devicetree properties that configure the AutAnalog continuous-time DAC.

Macro Definition Documentation

IFX_AUTANALOG_CTDAC_LIMIT_ABOVE

#define IFX_AUTANALOG_CTDAC_LIMIT_ABOVE   2

Result is above the configured range.

IFX_AUTANALOG_CTDAC_LIMIT_BELOW

#define IFX_AUTANALOG_CTDAC_LIMIT_BELOW   0

Result is below the configured range.

IFX_AUTANALOG_CTDAC_LIMIT_INSIDE

#define IFX_AUTANALOG_CTDAC_LIMIT_INSIDE   1

Result is inside the configured range.

IFX_AUTANALOG_CTDAC_LIMIT_OUTSIDE

#define IFX_AUTANALOG_CTDAC_LIMIT_OUTSIDE   3

Result is outside the configured range.

IFX_AUTANALOG_CTDAC_OP_ADDR

#define IFX_AUTANALOG_CTDAC_OP_ADDR   6

Address waveform table mode.

IFX_AUTANALOG_CTDAC_OP_CONT_FOUR_QUAD

#define IFX_AUTANALOG_CTDAC_OP_CONT_FOUR_QUAD   5

Continuous, four quadrants.

IFX_AUTANALOG_CTDAC_OP_CONT_ONE_QUAD

#define IFX_AUTANALOG_CTDAC_OP_CONT_ONE_QUAD   3

Continuous, one quadrant.

IFX_AUTANALOG_CTDAC_OP_CONT_TWO_QUAD

#define IFX_AUTANALOG_CTDAC_OP_CONT_TWO_QUAD   4

Continuous, two quadrants.

IFX_AUTANALOG_CTDAC_OP_DATA

#define IFX_AUTANALOG_CTDAC_OP_DATA   7

Data waveform table mode.

IFX_AUTANALOG_CTDAC_OP_OS_FOUR_QUAD

#define IFX_AUTANALOG_CTDAC_OP_OS_FOUR_QUAD   2

One-shot, four quadrants.

IFX_AUTANALOG_CTDAC_OP_OS_ONE_QUAD

#define IFX_AUTANALOG_CTDAC_OP_OS_ONE_QUAD   0

One-shot, one quadrant.

IFX_AUTANALOG_CTDAC_OP_OS_TWO_QUAD

#define IFX_AUTANALOG_CTDAC_OP_OS_TWO_QUAD   1

One-shot, two quadrants.

IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_HIGH_RAIL

#define IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_HIGH_RAIL   8

High power, charge pump on.

IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_LOW_RAIL

#define IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_LOW_RAIL   4

Low power, charge pump on.

IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_MEDIUM_RAIL

#define IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_MEDIUM_RAIL   6

Medium power, charge pump on.

IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_OFF

#define IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_OFF   0

Output buffer powered off.

IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_ULTRA_HIGH_RAIL

#define IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_ULTRA_HIGH_RAIL   10

Ultra high, charge pump on.

IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_ULTRA_LOW

#define IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_ULTRA_LOW   1

Ultra low power, charge pump off.

IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_ULTRA_LOW_RAIL

#define IFX_AUTANALOG_CTDAC_OUT_BUF_PWR_ULTRA_LOW_RAIL   2

Ultra low power, charge pump on.

IFX_AUTANALOG_CTDAC_REF_BUF_PWR_HIGH

#define IFX_AUTANALOG_CTDAC_REF_BUF_PWR_HIGH   7

High power mode.

IFX_AUTANALOG_CTDAC_REF_BUF_PWR_HIGH_RAIL

#define IFX_AUTANALOG_CTDAC_REF_BUF_PWR_HIGH_RAIL   8

High power, charge pump on.

IFX_AUTANALOG_CTDAC_REF_BUF_PWR_LOW_RAIL

#define IFX_AUTANALOG_CTDAC_REF_BUF_PWR_LOW_RAIL   4

Low power, charge pump on.

IFX_AUTANALOG_CTDAC_REF_BUF_PWR_MEDIUM_RAIL

#define IFX_AUTANALOG_CTDAC_REF_BUF_PWR_MEDIUM_RAIL   6

Medium power, charge pump on.

IFX_AUTANALOG_CTDAC_REF_BUF_PWR_OFF

#define IFX_AUTANALOG_CTDAC_REF_BUF_PWR_OFF   0

Reference buffer powered off.

IFX_AUTANALOG_CTDAC_REF_BUF_PWR_ULTRA_HIGH_RAIL

#define IFX_AUTANALOG_CTDAC_REF_BUF_PWR_ULTRA_HIGH_RAIL   10

Ultra high, charge pump on.

IFX_AUTANALOG_CTDAC_REF_BUF_PWR_ULTRA_LOW

#define IFX_AUTANALOG_CTDAC_REF_BUF_PWR_ULTRA_LOW   1

Ultra low power, charge pump off.

IFX_AUTANALOG_CTDAC_REF_BUF_PWR_ULTRA_LOW_RAIL

#define IFX_AUTANALOG_CTDAC_REF_BUF_PWR_ULTRA_LOW_RAIL   2

Ultra low power, charge pump on.

IFX_AUTANALOG_CTDAC_STAT_SEL_0

#define IFX_AUTANALOG_CTDAC_STAT_SEL_0   1

Use status selector 0.

IFX_AUTANALOG_CTDAC_STAT_SEL_1

#define IFX_AUTANALOG_CTDAC_STAT_SEL_1   2

Use status selector 1.

IFX_AUTANALOG_CTDAC_STAT_SEL_2

#define IFX_AUTANALOG_CTDAC_STAT_SEL_2   3

Use status selector 2.

IFX_AUTANALOG_CTDAC_STAT_SEL_DISABLED

#define IFX_AUTANALOG_CTDAC_STAT_SEL_DISABLED   0

Status selection disabled.

IFX_AUTANALOG_CTDAC_STEP_SEL_0

#define IFX_AUTANALOG_CTDAC_STEP_SEL_0   1

Use step value 0.

IFX_AUTANALOG_CTDAC_STEP_SEL_1

#define IFX_AUTANALOG_CTDAC_STEP_SEL_1   2

Use step value 1.

IFX_AUTANALOG_CTDAC_STEP_SEL_2

#define IFX_AUTANALOG_CTDAC_STEP_SEL_2   3

Use step value 2.

IFX_AUTANALOG_CTDAC_STEP_SEL_DISABLED

#define IFX_AUTANALOG_CTDAC_STEP_SEL_DISABLED   0

Step selection disabled.

IFX_AUTANALOG_CTDAC_TOPO_BUFFERED_EXTERNAL

#define IFX_AUTANALOG_CTDAC_TOPO_BUFFERED_EXTERNAL   4

Externally buffered output.

IFX_AUTANALOG_CTDAC_TOPO_BUFFERED_INTERNAL

#define IFX_AUTANALOG_CTDAC_TOPO_BUFFERED_INTERNAL   3

Internally buffered output.

IFX_AUTANALOG_CTDAC_TOPO_DIRECT

#define IFX_AUTANALOG_CTDAC_TOPO_DIRECT   0

Direct output.

IFX_AUTANALOG_CTDAC_TOPO_DIRECT_TRACK_CAP

#define IFX_AUTANALOG_CTDAC_TOPO_DIRECT_TRACK_CAP   1

Direct output with track capacitor.

IFX_AUTANALOG_CTDAC_TOPO_DIRECT_TRACK_HOLD

#define IFX_AUTANALOG_CTDAC_TOPO_DIRECT_TRACK_HOLD   2

Direct output with track-and-hold.

IFX_AUTANALOG_CTDAC_VREF_CTB0_OA0

#define IFX_AUTANALOG_CTDAC_VREF_CTB0_OA0   1

CTB0 OpAmp0 output.

IFX_AUTANALOG_CTDAC_VREF_CTB0_OA1

#define IFX_AUTANALOG_CTDAC_VREF_CTB0_OA1   2

CTB0 OpAmp1 output.

IFX_AUTANALOG_CTDAC_VREF_CTB1_OA0

#define IFX_AUTANALOG_CTDAC_VREF_CTB1_OA0   3

CTB1 OpAmp0 output.

IFX_AUTANALOG_CTDAC_VREF_CTB1_OA1

#define IFX_AUTANALOG_CTDAC_VREF_CTB1_OA1   4

CTB1 OpAmp1 output.

IFX_AUTANALOG_CTDAC_VREF_PRB_OUT0

#define IFX_AUTANALOG_CTDAC_VREF_PRB_OUT0   6

PRB output 0.

IFX_AUTANALOG_CTDAC_VREF_PRB_OUT1

#define IFX_AUTANALOG_CTDAC_VREF_PRB_OUT1   7

PRB output 1.

IFX_AUTANALOG_CTDAC_VREF_VBGR

#define IFX_AUTANALOG_CTDAC_VREF_VBGR   0

Band-gap reference.

IFX_AUTANALOG_CTDAC_VREF_VDDA

#define IFX_AUTANALOG_CTDAC_VREF_VDDA   0x100

VDDA supply.