pinctrl-rzv-common.h File Reference

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Macros
#define	PORT_00   0x0000 /* IO port 0 */
#define	PORT_01   0x0100 /* IO port 1 */
#define	PORT_02   0x0200 /* IO port 2 */
#define	PORT_03   0x0300 /* IO port 3 */
#define	PORT_04   0x0400 /* IO port 4 */
#define	PORT_05   0x0500 /* IO port 5 */
#define	PORT_06   0x0600 /* IO port 6 */
#define	PORT_07   0x0700 /* IO port 7 */
#define	PORT_08   0x0800 /* IO port 8 */
#define	PORT_09   0x0900 /* IO port 9 */
#define	PORT_10   0x0A00 /* IO port 10 */
#define	PORT_11   0x0B00 /* IO port 11 */
#define	PORT_12   0x0C00 /* IO port 12 */
#define	PORT_13   0x0D00 /* IO port 13 */
#define	PORT_14   0x0E00 /* IO port 14 */
#define	PORT_15   0x0F00 /* IO port 15 */
#define	PORT_16   0x1000 /* IO port 16 */
#define	PORT_17   0x1100 /* IO port 17 */
#define	PORT_18   0x1200 /* IO port 18 */
#define	PORT_19   0x1300 /* IO port 19 */
#define	PORT_20   0x1400 /* IO port 20 */
#define	PORT_21   0x1500 /* IO port 21 */
#define	PORT_22   0x1600 /* IO port 22 */
#define	PORT_23   0x1700 /* IO port 23 */
#define	PORT_24   0x1800 /* IO port 24 */
#define	PORT_25   0x1900 /* IO port 25 */
#define	PORT_26   0x1A00 /* IO port 26 */
#define	PORT_27   0x1B00 /* IO port 27 */
#define	PORT_28   0x1C00 /* IO port 28 */
#define	PORT_29   0x1D00 /* IO port 29 */
#define	PORT_30   0x1E00 /* IO port 30 */
#define	PORT_31   0x1F00 /* IO port 31 */
#define	PORT_32   0x2000 /* IO port 32 */
#define	PORT_33   0x2100 /* IO port 33 */
#define	PORT_34   0x2200 /* IO port 34 */
#define	PORT_35   0x2300 /* IO port 35 */
#define	PORT_36   0x2400 /* IO port 36 */
#define	PORT_37   0x2500 /* IO port 37 */
#define	PORT_38   0x2600 /* IO port 38 */
#define	PORT_39   0x2700 /* IO port 39 */
#define	PORT_40   0x2800 /* IO port 40 */
#define	PORT_41   0x2900 /* IO port 41 */
#define	PORT_42   0x2A00 /* IO port 42 */
#define	PORT_43   0x2B00 /* IO port 43 */
#define	PORT_44   0x2C00 /* IO port 44 */
#define	PORT_45   0x2D00 /* IO port 45 */
#define	PORT_46   0x2E00 /* IO port 46 */
#define	PORT_47   0x2F00 /* IO port 47 */
#define	PORT_48   0x3000 /* IO port 48 */
#define	RZV_PINMUX(port, pin, func)
#define	BSP_IO_NMI   0xFFFF0100 /* NMI */
#define	BSP_IO_TMS_SWDIO   0xFFFF0200 /* TMS_SWDIO */
#define	BSP_IO_TDO   0xFFFF0300 /* TDO */
#define	BSP_IO_AUDIO_CLK1   0xFFFF0400 /* AUDIO_CLK1 */
#define	BSP_IO_AUDIO_CLK2   0xFFFF0401 /* AUDIO_CLK2 */
#define	BSP_IO_SD0_CLK   0xFFFF0600 /* SD0_CLK */
#define	BSP_IO_SD0_CMD   0xFFFF0601 /* SD0_CMD */
#define	BSP_IO_SD0_RST_N   0xFFFF0602 /* SD0_RST_N */
#define	BSP_IO_SD0_DATA0   0xFFFF0700 /* SD0_DATA0 */
#define	BSP_IO_SD0_DATA1   0xFFFF0701 /* SD0_DATA1 */
#define	BSP_IO_SD0_DATA2   0xFFFF0702 /* SD0_DATA2 */
#define	BSP_IO_SD0_DATA3   0xFFFF0703 /* SD0_DATA3 */
#define	BSP_IO_SD0_DATA4   0xFFFF0704 /* SD0_DATA4 */
#define	BSP_IO_SD0_DATA5   0xFFFF0705 /* SD0_DATA5 */
#define	BSP_IO_SD0_DATA6   0xFFFF0706 /* SD0_DATA6 */
#define	BSP_IO_SD0_DATA7   0xFFFF0707 /* SD0_DATA7 */
#define	BSP_IO_SD1_CLK   0xFFFF0800 /* SD1_CLK */
#define	BSP_IO_SD1_CMD   0xFFFF0801 /* SD1_CMD */
#define	BSP_IO_SD1_DATA0   0xFFFF0900 /* SD1_DATA0 */
#define	BSP_IO_SD1_DATA1   0xFFFF0901 /* SD1_DATA1 */
#define	BSP_IO_SD1_DATA2   0xFFFF0902 /* SD1_DATA2 */
#define	BSP_IO_SD1_DATA3   0xFFFF0903 /* SD1_DATA3 */
#define	BSP_IO_QSPI0_SPCLK   0xFFFF0A00 /* QSPI0_SPCLK */
#define	BSP_IO_QSPI0_IO0   0xFFFF0A01 /* QSPI0_IO0 */
#define	BSP_IO_QSPI0_IO1   0xFFFF0A02 /* QSPI0_IO1 */
#define	BSP_IO_QSPI0_IO2   0xFFFF0A03 /* QSPI0_IO2 */
#define	BSP_IO_QSPI0_IO3   0xFFFF0A04 /* QSPI0_IO3 */
#define	BSP_IO_QSPI0_SSL   0xFFFF0A05 /* QSPI0_SSL */
#define	BSP_IO_QSPI1_SPCLK   0xFFFF0B00 /* QSPI1_SPCLK */
#define	BSP_IO_QSPI1_IO0   0xFFFF0B01 /* QSPI1_IO0 */
#define	BSP_IO_QSPI1_IO1   0xFFFF0B02 /* QSPI1_IO1 */
#define	BSP_IO_QSPI1_IO2   0xFFFF0B03 /* QSPI1_IO2 */
#define	BSP_IO_QSPI1_IO3   0xFFFF0B04 /* QSPI1_IO3 */
#define	BSP_IO_QSPI1_SSL   0xFFFF0B05 /* QSPI1_SSL */
#define	BSP_IO_QSPI_RESET_N   0xFFFF0C00 /* QSPI_RESET_N */
#define	BSP_IO_QSPI_WP_N   0xFFFF0C01 /* QSPI_WP_N */
#define	BSP_IO_QSPI_INT_N   0xFFFF0C02 /* QSPI_INT_N */
#define	BSP_IO_WDTOVF_PERROUT_N   0xFFFF0D00 /* WDTOVF_PERROUT_N */
#define	BSP_IO_RIIC0_SDA   0xFFFF0E00 /* RIIC0_SDA */
#define	BSP_IO_RIIC0_SCL   0xFFFF0E01 /* RIIC0_SCL */
#define	BSP_IO_RIIC1_SDA   0xFFFF0E02 /* RIIC1_SDA */
#define	BSP_IO_RIIC1_SCL   0xFFFF0E03 /* RIIC1_SCL */
#define	RZV_FILNUM_4_STAGE   0
#define	RZV_FILNUM_8_STAGE   1
#define	RZV_FILNUM_12_STAGE   2
#define	RZV_FILNUM_16_STAGE   3
#define	RZV_FILCLKSEL_NOT_DIV   0
#define	RZV_FILCLKSEL_DIV_9000   1
#define	RZV_FILCLKSEL_DIV_18000   2
#define	RZV_FILCLKSEL_DIV_36000   3
#define	RZV_FILTER_SET(filnum, filclksel)

Macro Definition Documentation

BSP_IO_AUDIO_CLK1

#define BSP_IO_AUDIO_CLK1   0xFFFF0400 /* AUDIO_CLK1 */

BSP_IO_AUDIO_CLK2

#define BSP_IO_AUDIO_CLK2   0xFFFF0401 /* AUDIO_CLK2 */

BSP_IO_NMI

#define BSP_IO_NMI   0xFFFF0100 /* NMI */

BSP_IO_QSPI0_IO0

#define BSP_IO_QSPI0_IO0   0xFFFF0A01 /* QSPI0_IO0 */

BSP_IO_QSPI0_IO1

#define BSP_IO_QSPI0_IO1   0xFFFF0A02 /* QSPI0_IO1 */

BSP_IO_QSPI0_IO2

#define BSP_IO_QSPI0_IO2   0xFFFF0A03 /* QSPI0_IO2 */

BSP_IO_QSPI0_IO3

#define BSP_IO_QSPI0_IO3   0xFFFF0A04 /* QSPI0_IO3 */

BSP_IO_QSPI0_SPCLK

#define BSP_IO_QSPI0_SPCLK   0xFFFF0A00 /* QSPI0_SPCLK */

BSP_IO_QSPI0_SSL

#define BSP_IO_QSPI0_SSL   0xFFFF0A05 /* QSPI0_SSL */

BSP_IO_QSPI1_IO0

#define BSP_IO_QSPI1_IO0   0xFFFF0B01 /* QSPI1_IO0 */

BSP_IO_QSPI1_IO1

#define BSP_IO_QSPI1_IO1   0xFFFF0B02 /* QSPI1_IO1 */

BSP_IO_QSPI1_IO2

#define BSP_IO_QSPI1_IO2   0xFFFF0B03 /* QSPI1_IO2 */

BSP_IO_QSPI1_IO3

#define BSP_IO_QSPI1_IO3   0xFFFF0B04 /* QSPI1_IO3 */

BSP_IO_QSPI1_SPCLK

#define BSP_IO_QSPI1_SPCLK   0xFFFF0B00 /* QSPI1_SPCLK */

BSP_IO_QSPI1_SSL

#define BSP_IO_QSPI1_SSL   0xFFFF0B05 /* QSPI1_SSL */

BSP_IO_QSPI_INT_N

#define BSP_IO_QSPI_INT_N   0xFFFF0C02 /* QSPI_INT_N */

BSP_IO_QSPI_RESET_N

#define BSP_IO_QSPI_RESET_N   0xFFFF0C00 /* QSPI_RESET_N */

BSP_IO_QSPI_WP_N

#define BSP_IO_QSPI_WP_N   0xFFFF0C01 /* QSPI_WP_N */

BSP_IO_RIIC0_SCL

#define BSP_IO_RIIC0_SCL   0xFFFF0E01 /* RIIC0_SCL */

BSP_IO_RIIC0_SDA

#define BSP_IO_RIIC0_SDA   0xFFFF0E00 /* RIIC0_SDA */

BSP_IO_RIIC1_SCL

#define BSP_IO_RIIC1_SCL   0xFFFF0E03 /* RIIC1_SCL */

BSP_IO_RIIC1_SDA

#define BSP_IO_RIIC1_SDA   0xFFFF0E02 /* RIIC1_SDA */

BSP_IO_SD0_CLK

#define BSP_IO_SD0_CLK   0xFFFF0600 /* SD0_CLK */

BSP_IO_SD0_CMD

#define BSP_IO_SD0_CMD   0xFFFF0601 /* SD0_CMD */

BSP_IO_SD0_DATA0

#define BSP_IO_SD0_DATA0   0xFFFF0700 /* SD0_DATA0 */

BSP_IO_SD0_DATA1

#define BSP_IO_SD0_DATA1   0xFFFF0701 /* SD0_DATA1 */

BSP_IO_SD0_DATA2

#define BSP_IO_SD0_DATA2   0xFFFF0702 /* SD0_DATA2 */

BSP_IO_SD0_DATA3

#define BSP_IO_SD0_DATA3   0xFFFF0703 /* SD0_DATA3 */

BSP_IO_SD0_DATA4

#define BSP_IO_SD0_DATA4   0xFFFF0704 /* SD0_DATA4 */

BSP_IO_SD0_DATA5

#define BSP_IO_SD0_DATA5   0xFFFF0705 /* SD0_DATA5 */

BSP_IO_SD0_DATA6

#define BSP_IO_SD0_DATA6   0xFFFF0706 /* SD0_DATA6 */

BSP_IO_SD0_DATA7

#define BSP_IO_SD0_DATA7   0xFFFF0707 /* SD0_DATA7 */

BSP_IO_SD0_RST_N

#define BSP_IO_SD0_RST_N   0xFFFF0602 /* SD0_RST_N */

BSP_IO_SD1_CLK

#define BSP_IO_SD1_CLK   0xFFFF0800 /* SD1_CLK */

BSP_IO_SD1_CMD

#define BSP_IO_SD1_CMD   0xFFFF0801 /* SD1_CMD */

BSP_IO_SD1_DATA0

#define BSP_IO_SD1_DATA0   0xFFFF0900 /* SD1_DATA0 */

BSP_IO_SD1_DATA1

#define BSP_IO_SD1_DATA1   0xFFFF0901 /* SD1_DATA1 */

BSP_IO_SD1_DATA2

#define BSP_IO_SD1_DATA2   0xFFFF0902 /* SD1_DATA2 */

BSP_IO_SD1_DATA3

#define BSP_IO_SD1_DATA3   0xFFFF0903 /* SD1_DATA3 */

BSP_IO_TDO

#define BSP_IO_TDO   0xFFFF0300 /* TDO */

BSP_IO_TMS_SWDIO

#define BSP_IO_TMS_SWDIO   0xFFFF0200 /* TMS_SWDIO */

BSP_IO_WDTOVF_PERROUT_N

#define BSP_IO_WDTOVF_PERROUT_N   0xFFFF0D00 /* WDTOVF_PERROUT_N */

PORT_00

#define PORT_00   0x0000 /* IO port 0 */

PORT_01

#define PORT_01   0x0100 /* IO port 1 */

PORT_02

#define PORT_02   0x0200 /* IO port 2 */

PORT_03

#define PORT_03   0x0300 /* IO port 3 */

PORT_04

#define PORT_04   0x0400 /* IO port 4 */

PORT_05

#define PORT_05   0x0500 /* IO port 5 */

PORT_06

#define PORT_06   0x0600 /* IO port 6 */

PORT_07

#define PORT_07   0x0700 /* IO port 7 */

PORT_08

#define PORT_08   0x0800 /* IO port 8 */

PORT_09

#define PORT_09   0x0900 /* IO port 9 */

PORT_10

#define PORT_10   0x0A00 /* IO port 10 */

PORT_11

#define PORT_11   0x0B00 /* IO port 11 */

PORT_12

#define PORT_12   0x0C00 /* IO port 12 */

PORT_13

#define PORT_13   0x0D00 /* IO port 13 */

PORT_14

#define PORT_14   0x0E00 /* IO port 14 */

PORT_15

#define PORT_15   0x0F00 /* IO port 15 */

PORT_16

#define PORT_16   0x1000 /* IO port 16 */

PORT_17

#define PORT_17   0x1100 /* IO port 17 */

PORT_18

#define PORT_18   0x1200 /* IO port 18 */

PORT_19

#define PORT_19   0x1300 /* IO port 19 */

PORT_20

#define PORT_20   0x1400 /* IO port 20 */

PORT_21

#define PORT_21   0x1500 /* IO port 21 */

PORT_22

#define PORT_22   0x1600 /* IO port 22 */

PORT_23

#define PORT_23   0x1700 /* IO port 23 */

PORT_24

#define PORT_24   0x1800 /* IO port 24 */

PORT_25

#define PORT_25   0x1900 /* IO port 25 */

PORT_26

#define PORT_26   0x1A00 /* IO port 26 */

PORT_27

#define PORT_27   0x1B00 /* IO port 27 */

PORT_28

#define PORT_28   0x1C00 /* IO port 28 */

PORT_29

#define PORT_29   0x1D00 /* IO port 29 */

PORT_30

#define PORT_30   0x1E00 /* IO port 30 */

PORT_31

#define PORT_31   0x1F00 /* IO port 31 */

PORT_32

#define PORT_32   0x2000 /* IO port 32 */

PORT_33

#define PORT_33   0x2100 /* IO port 33 */

PORT_34

#define PORT_34   0x2200 /* IO port 34 */

PORT_35

#define PORT_35   0x2300 /* IO port 35 */

PORT_36

#define PORT_36   0x2400 /* IO port 36 */

PORT_37

#define PORT_37   0x2500 /* IO port 37 */

PORT_38

#define PORT_38   0x2600 /* IO port 38 */

PORT_39

#define PORT_39   0x2700 /* IO port 39 */

PORT_40

#define PORT_40   0x2800 /* IO port 40 */

PORT_41

#define PORT_41   0x2900 /* IO port 41 */

PORT_42

#define PORT_42   0x2A00 /* IO port 42 */

PORT_43

#define PORT_43   0x2B00 /* IO port 43 */

PORT_44

#define PORT_44   0x2C00 /* IO port 44 */

PORT_45

#define PORT_45   0x2D00 /* IO port 45 */

PORT_46

#define PORT_46   0x2E00 /* IO port 46 */

PORT_47

#define PORT_47   0x2F00 /* IO port 47 */

PORT_48

#define PORT_48   0x3000 /* IO port 48 */

RZV_FILCLKSEL_DIV_18000

#define RZV_FILCLKSEL_DIV_18000   2

RZV_FILCLKSEL_DIV_36000

#define RZV_FILCLKSEL_DIV_36000   3

RZV_FILCLKSEL_DIV_9000

#define RZV_FILCLKSEL_DIV_9000   1

RZV_FILCLKSEL_NOT_DIV

#define RZV_FILCLKSEL_NOT_DIV   0

RZV_FILNUM_12_STAGE

#define RZV_FILNUM_12_STAGE   2

RZV_FILNUM_16_STAGE

#define RZV_FILNUM_16_STAGE   3

RZV_FILNUM_4_STAGE

#define RZV_FILNUM_4_STAGE   0

RZV_FILNUM_8_STAGE

#define RZV_FILNUM_8_STAGE   1

RZV_FILTER_SET

#define RZV_FILTER_SET	(		filnum,
			filclksel )

Value:

(((filnum) & 0x3) << 0x2) | (filclksel & 0x3)

RZV_PINMUX

#define RZV_PINMUX	(		port,
			pin,
			func )

Value:

(port | pin | (func << 4))