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Zephyr API Documentation 4.3.99
A Scalable Open Source RTOS
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Renesas RA Clock Generator Circuit (CGC) definitions for Zephyr. More...
Go to the source code of this file.
Macros | |
Renesas RA Module Stop Control Register (MSTP) definitions | |
| #define | MSTPA 0 |
| Module stop control register A. | |
| #define | MSTPB 1 |
| Module stop control register B. | |
| #define | MSTPC 2 |
| Module stop control register C. | |
| #define | MSTPD 3 |
| Module stop control register D. | |
| #define | MSTPE 4 |
| Module stop control register E. | |
Renesas RA Clock Generator Circuit (CGC) definitions for Zephyr.
| #define MSTPA 0 |
Module stop control register A.
| #define MSTPB 1 |
Module stop control register B.
| #define MSTPC 2 |
Module stop control register C.
| #define MSTPD 3 |
Module stop control register D.
| #define MSTPE 4 |
Module stop control register E.