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Zephyr API Documentation 4.5.0-rc1
A Scalable Open Source RTOS
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Mux / gate clock configuration for SiWx91x clock managers. More...
#include <zephyr/drivers/clock_control/clock_control_silabs_siwx91x.h>
Data Fields | |
| uint32_t | clkid |
Clock identifier (SIWX91X_CLK_*). | |
| uint32_t | ref_clkid |
| Parent / reference clock identifier. | |
| uint32_t | clock_div |
| Optional divider applied after the mux. | |
Mux / gate clock configuration for SiWx91x clock managers.
| uint32_t silabs_siwx91x_clock_control_config::clkid |
Clock identifier (SIWX91X_CLK_*).
| uint32_t silabs_siwx91x_clock_control_config::clock_div |
Optional divider applied after the mux.
| uint32_t silabs_siwx91x_clock_control_config::ref_clkid |
Parent / reference clock identifier.