Zephyr API Documentation 4.3.99
A Scalable Open Source RTOS
Loading...
Searching...
No Matches
barrier.h
Go to the documentation of this file.
1/*
2 * Copyright (c) 2023 Carlo Caione <ccaione@baylibre.com>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#ifndef ZEPHYR_INCLUDE_SYS_BARRIER_H_
8#define ZEPHYR_INCLUDE_SYS_BARRIER_H_
9
10#include <zephyr/toolchain.h>
11
12#if defined(CONFIG_BARRIER_OPERATIONS_ARCH)
13# if defined(CONFIG_ARM)
15# elif defined(CONFIG_ARM64)
17# endif
18#elif defined(CONFIG_BARRIER_OPERATIONS_BUILTIN)
20#endif
21
22#ifdef __cplusplus
23extern "C" {
24#endif
25
33
42{
43#if defined(CONFIG_BARRIER_OPERATIONS_ARCH) || defined(CONFIG_BARRIER_OPERATIONS_BUILTIN)
44 z_barrier_sync_synchronize();
45#endif
46}
47
55{
56#if defined(CONFIG_BARRIER_OPERATIONS_ARCH) || defined(CONFIG_BARRIER_OPERATIONS_BUILTIN)
57 z_barrier_dmem_fence_full();
58#endif
59}
60
74{
75#if defined(CONFIG_BARRIER_OPERATIONS_ARCH) || defined(CONFIG_BARRIER_OPERATIONS_BUILTIN)
76 z_barrier_dsync_fence_full();
77#endif
78}
79
93{
94#if defined(CONFIG_BARRIER_OPERATIONS_ARCH) || defined(CONFIG_BARRIER_OPERATIONS_BUILTIN)
95 z_barrier_isync_fence_full();
96#endif
97}
98
100
101#ifdef __cplusplus
102} /* extern "C" */
103#endif
104
105#endif /* ZEPHYR_INCLUDE_SYS_ATOMIC_H_ */
static ALWAYS_INLINE void barrier_sync_synchronize(void)
Full/sequentially-consistent data memory barrier across cores.
Definition barrier.h:41
static ALWAYS_INLINE void barrier_isync_fence_full(void)
Full/sequentially-consistent instruction synchronization barrier.
Definition barrier.h:92
static ALWAYS_INLINE void barrier_dsync_fence_full(void)
Full/sequentially-consistent data synchronization barrier.
Definition barrier.h:73
static ALWAYS_INLINE void barrier_dmem_fence_full(void)
Full/sequentially-consistent data memory barrier.
Definition barrier.h:54
#define ALWAYS_INLINE
Definition common.h:160
Macros to abstract toolchain specific capabilities.