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Zephyr API Documentation 4.4.99
A Scalable Open Source RTOS
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Texas Instruments DM Timer Clock Source Definitions. More...
Go to the source code of this file.
Macros | |
TI DM Timer Clock Sources | |
| #define | HFOSC0_CLKOUT 0x0 |
| High-frequency oscillator 0 clock output. | |
| #define | HFOSC0_CLKOUT_32K 0x1 |
| High-frequency oscillator 0 clock output 32K. | |
| #define | MAIN_PLL0_HSDIV7_CLKOUT 0x2 |
| Main PLL0 HSDIV7 clock output. | |
| #define | CLK_12M_RC 0x3 |
| 12MHz RC clock | |
| #define | MCU_EXT_REFCLK0 0x4 |
| MCU external reference clock 0. | |
| #define | EXT_REFCLK1 0x5 |
| External reference clock 1. | |
| #define | CPTS_RFT_CLK 0x6 |
| CPTS reference frequency test clock. | |
| #define | CPSW3G_CPTS_RFT_CLK 0x7 |
| CPSW 3-port Gigabit Switch CPTS reference frequency test clock. | |
| #define | MAIN_PLL1_HSDIV3_CLKOUT 0x8 |
| Main PLL1 HSDIV3 clock output. | |
| #define | MAIN_PLL2_HSDIV6_CLKOUT 0x9 |
| Main PLL2 HSDIV6 clock output. | |
| #define | CPSW3G_CPTS_GENF0 0xA |
| CPSW 3-port Gigabit Switch CPTS function 0 clock. | |
| #define | CPSW3G_CPTS_GENF1 0xB |
| CPSW 3-port Gigabit Switch CPTS function 1 clock. | |
| #define | CPTS_GENF1 0xC |
| CPTS function 1 clock. | |
| #define | CPTS_GENF2 0xD |
| CPTS function 2 clock. | |
| #define | CPTS_GENF3 0xE |
| CPTS function 3 clock. | |
| #define | CPTS_GENF4 0xF |
| CPTS function 4 clock. | |
Texas Instruments DM Timer Clock Source Definitions.
| #define CLK_12M_RC 0x3 |
12MHz RC clock
| #define CPSW3G_CPTS_GENF0 0xA |
CPSW 3-port Gigabit Switch CPTS function 0 clock.
| #define CPSW3G_CPTS_GENF1 0xB |
CPSW 3-port Gigabit Switch CPTS function 1 clock.
| #define CPSW3G_CPTS_RFT_CLK 0x7 |
CPSW 3-port Gigabit Switch CPTS reference frequency test clock.
| #define CPTS_GENF1 0xC |
CPTS function 1 clock.
| #define CPTS_GENF2 0xD |
CPTS function 2 clock.
| #define CPTS_GENF3 0xE |
CPTS function 3 clock.
| #define CPTS_GENF4 0xF |
CPTS function 4 clock.
| #define CPTS_RFT_CLK 0x6 |
CPTS reference frequency test clock.
| #define EXT_REFCLK1 0x5 |
External reference clock 1.
| #define HFOSC0_CLKOUT 0x0 |
High-frequency oscillator 0 clock output.
| #define HFOSC0_CLKOUT_32K 0x1 |
High-frequency oscillator 0 clock output 32K.
| #define MAIN_PLL0_HSDIV7_CLKOUT 0x2 |
Main PLL0 HSDIV7 clock output.
| #define MAIN_PLL1_HSDIV3_CLKOUT 0x8 |
Main PLL1 HSDIV3 clock output.
| #define MAIN_PLL2_HSDIV6_CLKOUT 0x9 |
Main PLL2 HSDIV6 clock output.
| #define MCU_EXT_REFCLK0 0x4 |
MCU external reference clock 0.