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Zephyr API Documentation 4.1.99
A Scalable Open Source RTOS
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4.1.99 |
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Zephyr API Documentation 4.1.99
A Scalable Open Source RTOS
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4.1.99 |
#include <dac161s997.h>
Data Fields | ||
| uint8_t | raw | |
| struct { | ||
| bool current_loop_status: 1 | ||
| True if the DAC161S997 is unable to maintain the output current. More... | ||
| bool loop_status: 1 | ||
| Identical to current_loop_status except this bit is sticky. More... | ||
| bool spi_timeout_error: 1 | ||
| True if a SPI command has not been received within SPI timeout period (default 100 ms). More... | ||
| bool frame_status: 1 | ||
| A frame error is caused by an incorrect number of clocks during a register write. More... | ||
| bool error_level_pin_state: 1 | ||
| Returns the state of the ERR_LVL pin. More... | ||
| uint8_t dac_resolution: 3 | ||
| DAC resolution register. More... | ||
| }; | ||
| struct { ... } dac161s997_status |
| bool dac161s997_status::current_loop_status |
True if the DAC161S997 is unable to maintain the output current.
| uint8_t dac161s997_status::dac_resolution |
DAC resolution register.
Always returns 0x7.
| bool dac161s997_status::error_level_pin_state |
Returns the state of the ERR_LVL pin.
| bool dac161s997_status::frame_status |
A frame error is caused by an incorrect number of clocks during a register write.
A register write without an integer multiple of 24 clock cycles will cause a Frame error.
| bool dac161s997_status::loop_status |
Identical to current_loop_status except this bit is sticky.
| uint8_t dac161s997_status::raw |
| bool dac161s997_status::spi_timeout_error |
True if a SPI command has not been received within SPI timeout period (default 100 ms).
If this error occurs, it is cleared with a properly formatted write command to a valid address.
1.12.0 