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Zephyr API Documentation 4.3.99
A Scalable Open Source RTOS
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DAC161S997 Status Register. More...
#include <zephyr/drivers/dac/dac161s997.h>
Data Fields | |
| uint8_t | raw |
| Raw 8-bit value of the status register. | |
| struct { | |
| bool current_loop_status: 1 | |
| Loop error status (real-time). More... | |
| bool loop_status: 1 | |
| Loop error status (latched). More... | |
| bool spi_timeout_error: 1 | |
| SPI timeout error. More... | |
| bool frame_status: 1 | |
| Frame error. More... | |
| bool error_level_pin_state: 1 | |
| ERR_LVL pin state. More... | |
| uint8_t dac_resolution: 3 | |
| DAC resolution. More... | |
| }; | |
| Bit-field access to the status register. | |
DAC161S997 Status Register.
This union represents the contents of the DAC161S997's STATUS register. It provides access to individual status bits as well as the raw register value.
| struct { ... } dac161s997_status |
Bit-field access to the status register.
| bool dac161s997_status::current_loop_status |
Loop error status (real-time).
This flag is set to true when the loop supply voltage is too low to support the programmed output current.
| uint8_t dac161s997_status::dac_resolution |
DAC resolution.
Always returns 0x7.
| bool dac161s997_status::error_level_pin_state |
ERR_LVL pin state.
| bool dac161s997_status::frame_status |
Frame error.
A frame error is caused by an incorrect number of clocks during a register write. A register write without an integer multiple of 24 clock cycles will cause a frame error.
| bool dac161s997_status::loop_status |
Loop error status (latched).
Similar to current_loop_status, except that this flag stays set until the status register is read or the device is reset.
| uint8_t dac161s997_status::raw |
Raw 8-bit value of the status register.
| bool dac161s997_status::spi_timeout_error |
SPI timeout error.
The default timeout is 100 ms. If this error occurs, it is cleared with a properly formatted write command to a valid address.